EP910ILC-25 vs EP910ILI-25 Comparaison
Comparaison détaillée côte à côte de EP910ILC-25 par Intel et EP910ILI-25 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910ILC-25 | EP910ILI-25 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $7,25 |
| Family | EP910 Classic EPLD | — |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | — |
| Logic Blocks | Sum-of-products AND/OR array | — |
| Technology | CMOS EPROM (UV-erasable) | CMOS, EPROM |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | — |
| Boîtier | 44-pin JLCC (windowed ceramic) | PLCC-44 (windowed ceramic, J-lead) |
| Type de montage | Surface Mount | — |
| Température de fonctionnement | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| Tension d'alimentation | 5 V | — |
| Development Tool | Altera MAX+PLUS II (legacy) | — |
| Statut RoHS | non_compliant (ceramic windowed package) | Non-compliant (windowed ceramic package) |
| Statut du cycle de vie | Obsolete - last time buy was late 1990s | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Series | — | EP910 (Classic EPLD) |
| Dedicated Inputs | — | 12 |
| I/O Pins | — | 24 |
| Product Terms | — | 240 (maximum) |
| Architecture | — | PAL-type with global interconnect bus |
| Operating Voltage | — | 5 V (4.75 V to 5.25 V) |
| Programming Method | — | UV-erasable (windowed), MAX+PLUS II programmer |
| Logic Test Circuitry | — | On-board JTAG-compatible test |