EP910JM-40 vs EP910ILC-25 Comparaison
Comparaison détaillée côte à côte de EP910JM-40 par Altera et EP910ILC-25 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910JM-40 | EP910ILC-25 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $9,95 |
| Device Family | Altera Classic EPLD | — |
| Series | EP910 | — |
| Logic Type | EPLD (UV-Erasable PAL-type) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | — |
| I/O Lines | 24 | — |
| Total Inputs (max) | 36 | — |
| Total Outputs (max) | 24 | — |
| Product Terms | 240 | — |
| External Clock Inputs | 2 | — |
| Propagation Delay (tPD) | 40 ns | 25 ns |
| Process Technology | CMOS | — |
| Boîtier | JLCC-28 (windowed ceramic, J-lead) | 44-pin JLCC (windowed ceramic) |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS status - UV-windowed ceramic package typically not RoHS compliant] | non_compliant (ceramic windowed package) |
| Programming Method | UV erase + EPROM programmer | — |
| Température de fonctionnement | 0C to +70C (commercial) [DATA_NEEDED: confirm grade] | -40C to +85C (industrial) |
| Family | — | EP910 Classic EPLD |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Technology | — | CMOS EPROM (UV-erasable) |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Tension d'alimentation | — | 5 V |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Statut du cycle de vie | — | Obsolete - last time buy was late 1990s |