EP910LC-30 vs EP910LC-35T Comparaison
Comparaison détaillée côte à côte de EP910LC-30 par Altera et EP910LC-35T par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910LC-30 | EP910LC-35T |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $22,50 | $28,90 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocell Count | 24 | — |
| Propagation Delay (tPD) | 30 ns (max) | 35 ns |
| Maximum Toggle Frequency | 62 MHz | — |
| Supply Voltage (VCC) | 5 V (nominal, TTL) | 5 V |
| Process Technology | CMOS (EPROM-based) | CMOS (EPROM-based) |
| Package Type | PDIP-40 (Plastic DIP, through-hole) | — |
| Operating Temperature Grade | Commercial (0C to +70C) | — |
| I/O Pin Count | 24 | — |
| Dedicated Input Pins | 36 (including I/O) | — |
| Product Terms per Macrocell | Up to 16 | — |
| Programming Technology | UV-erasable EPROM cell | — |
| Development Tool | Altera MAX+PLUS II | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | MSL 3 (168 hours) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status not in verified data] |
| Family | — | Classic EPLD (EP910) |
| Logic Capacity | — | 450 usable gates |
| Macrocells | — | 24 |
| Maximum Operating Frequency | — | 28.6 MHz |
| User I/O Pins | — | 36 |
| Boîtier | — | PLCC-44 (J-lead) |
| Température de fonctionnement | — | 0C to +70C (commercial) |
| Erasure Method | — | UV-erasable window (ceramic package) / OTP (plastic) |
| Programming | — | Altera programming hardware + MAX+PLUS II |
| Type de montage | — | Surface Mount (PLCC socket or solder) |