EP910LC-35T vs EP910LC-25 Comparaison
Comparaison détaillée côte à côte de EP910LC-35T par Altera et EP910LC-25 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910LC-35T | EP910LC-25 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $28,90 | $2,20 |
| Family | Classic EPLD (EP910) | Altera Classic EPLD |
| Logic Capacity | 450 usable gates | — |
| Macrocells | 24 | 24 |
| Propagation Delay (tPD) | 35 ns | 25 ns |
| Maximum Operating Frequency | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| User I/O Pins | 36 | — |
| Boîtier | PLCC-44 (J-lead) | 28-pin PLCC (LC suffix) |
| Process Technology | CMOS (EPROM-based) | — |
| Température de fonctionnement | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Erasure Method | UV-erasable window (ceramic package) / OTP (plastic) | — |
| Programming | Altera programming hardware + MAX+PLUS II | — |
| Type de montage | Surface Mount (PLCC socket or solder) | Surface Mount |
| Niveau MSL | MSL 3 (168 hours) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status not in verified data] | [DATA_NEEDED: RoHS status] |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| Dedicated Inputs | — | 16 |
| Technology | — | CMOS (EPROM-based) |
| Operating Voltage | — | [DATA_NEEDED: VCC range] |
| Programmable | — | Yes (EPROM, UV-erasable on windowed variants) |
| I/O Pins | — | [DATA_NEEDED: I/O count] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |