EP910LC44-40 vs EP910LC-40 Comparaison
Comparaison détaillée côte à côte de EP910LC44-40 par Altera et EP910LC-40 par Rochester Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 ObsoleteComparaison des spécifications
| Paramètre | EP910LC44-40 | EP910LC-40 |
|---|---|---|
| Marque | Altera | Rochester Electronics |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,75 | $52,00 |
| Family | Altera Classic EPLD | — |
| Macrocells | 24 | 24 |
| Product Terms (Total) | 240 | — |
| I/O Pins | 24 (bidirectional) | — |
| Dedicated Inputs | 12 | 4 |
| Total Inputs | 36 | — |
| Global Clock Inputs | 2 | — |
| Propagation Delay (tPD) | 40 ns | 40 ns |
| Supply Voltage (VCC) | 5 V (nominal) | 5 V (single supply) |
| Technology | CMOS, UV-erasable EPROM | CMOS EPROM |
| Logic Compatibility | TTL-compatible I/O | — |
| Boîtier | 44-pin PLCC (Plastic Leaded Chip Carrier) | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) |
| Température de fonctionnement | 0C to +70C (commercial) | — |
| Programming Method | JEDEC file via LP6/MP9 or compatible programmer | Altera Logic Programmer (PLAD-J), 4-wire serial |
| Type de montage | Surface Mount | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Not applicable (legacy) |
| Manufacturer | — | Rochester Electronics (Altera original) |
| Device Family | — | Altera Classic EPLD - EP910 |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Logic Array Blocks | — | 2 (12 macrocells each) |
| Maximum Toggle Frequency (fMAX) | — | 25 MHz |
| User I/O Pins | — | 36 |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| Lead-Free Status | — | Not applicable |