EP910LI-30 vs EP910LC44-30T Comparaison
Comparaison détaillée côte à côte de EP910LI-30 par Rochester Electronics et EP910LC44-30T par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP910LI-30 - 24-Macrocell EPLD, 30ns, PQCC44 | Rochester/Altera
EP910LI-30 Obsolete
Comparaison des spécifications
| Paramètre | EP910LI-30 | EP910LC44-30T |
|---|---|---|
| Marque | Rochester Electronics | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $49,50 | $9,75 |
| Family | Altera Classic EPLD EP910 | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Equivalent Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | 33 ns |
| Supply Voltage (VCC) | 5 V ±5% (4.75 V to 5.25 V) | 4.75 V to 5.25 V (nominal 5 V) |
| Supply Current (ICC) | [DATA_NEEDED: ICC standby/active] | — |
| Température de fonctionnement | -40C to +85C (Industrial) | — |
| Process Technology | CMOS EPROM, UV-erasable | — |
| Boîtier | 44-pin PQCC / PLCC-44 (J-lead) | PQCC-44 (Plastic Leaded Chip Carrier, J-bend) |
| Type de montage | Surface Mount (socket recommended for UV erasure) | Surface Mount |
| Dedicated Inputs | 10 | 12 |
| I/O Pins | 22 | — |
| Programming Method | Altera EPLD programming algorithm / MAX+PLUS II legacy support | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance not verified in scraped data] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Manufacturer (Original) | Altera (now Intel PSG) | — |
| Current Stocking Channel | Rochester Electronics (authorized aftermarket) | — |
| Device Family | — | Classic EPLD |
| Logic Type | — | PAL-type CMOS EPLD (OT PLD) |
| Product Terms | — | 240 |
| I/O Lines | — | 24 (bidirectional) |
| Total Inputs | — | 36 |
| Total Outputs | — | 24 |
| External Clock Inputs | — | 2 |
| Programming Technology | — | CMOS, UV-erasable (windowed package in family) |
| Security Bit | — | Programmable (logic readback protection) |
| Operating Temperature Grade | — | Commercial |
| Terminal Form | — | J-BEND |
| Package Code | — | QCCJ |