EP910LI-30 vs EP910LI-35BF Comparaison
Comparaison détaillée côte à côte de EP910LI-30 par Rochester Electronics et EP910LI-35BF par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP910LI-30 - 24-Macrocell EPLD, 30ns, PQCC44 | Rochester/Altera
EP910LI-30 ObsoleteComparaison des spécifications
| Paramètre | EP910LI-30 | EP910LI-35BF |
|---|---|---|
| Marque | Rochester Electronics | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $49,50 | $23,95 |
| Family | Altera Classic EPLD EP910 | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Equivalent Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Supply Voltage (VCC) | 5 V ±5% (4.75 V to 5.25 V) | 5 V (nominal) |
| Supply Current (ICC) | [DATA_NEEDED: ICC standby/active] | — |
| Température de fonctionnement | -40C to +85C (Industrial) | — |
| Process Technology | CMOS EPROM, UV-erasable | — |
| Boîtier | 44-pin PQCC / PLCC-44 (J-lead) | 44-pin PLCC (J-lead) |
| Type de montage | Surface Mount (socket recommended for UV erasure) | — |
| Dedicated Inputs | 10 | — |
| I/O Pins | 22 | — |
| Programming Method | Altera EPLD programming algorithm / MAX+PLUS II legacy support | EPROM/UV-erase programmer (Altera Classic algorithm) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance not verified in scraped data] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Manufacturer (Original) | Altera (now Intel PSG) | — |
| Current Stocking Channel | Rochester Electronics (authorized aftermarket) | — |
| Device Family | — | Altera Classic EPLD |
| Part Number Base | — | EP910 |
| Logic Density | — | 450 usable gates |
| Maximum Pin-to-Pin Delay (tpd) | — | 35 ns |
| Maximum Toggle Frequency (fmax) | — | 28.6 MHz |
| Plage de température de fonctionnement | — | Industrial (LI suffix) |
| Technology | — | CMOS, UV-erasable |
| Output Polarity Control | — | Programmable XOR per macrocell |
| Flip-Flop Type | — | Selectable D/T/JK/SR per macrocell |
| TTL Compatibility | — | 100% TTL emulation |
| Compliance / EOL Status | — | Obsolete - last-time buy exhausted; second-source via Rochester Electronics |