EP910LI-40T vs EP910LC-40 Comparaison
Comparaison détaillée côte à côte de EP910LI-40T par Intel et EP910LC-40 par Rochester Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 ObsoleteComparaison des spécifications
| Paramètre | EP910LI-40T | EP910LC-40 |
|---|---|---|
| Marque | Intel | Rochester Electronics |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,75 | $52,00 |
| Family | Classic EPLD | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 4 |
| I/O Pins | 24 | — |
| Maximum Inputs | 36 | — |
| Maximum Outputs | 24 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 40 ns | 40 ns |
| Technology | CMOS, UV-erasable EPROM | CMOS EPROM |
| Tension d'alimentation | 5 V (typical) | — |
| Température de fonctionnement | -40C to +85C (Industrial) | — |
| Architecture | PAL-type with global bus | — |
| Boîtier | Tape and Reel (suffix T); 40-pin DIP / 44-pin PLCC | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) |
| Statut RoHS | [DATA_NEEDED: rohs status] | Not applicable (legacy) |
| Programming Method | Altera Master Programming Unit (MPU), no JTAG | Altera Logic Programmer (PLAD-J), 4-wire serial |
| Manufacturer | — | Rochester Electronics (Altera original) |
| Device Family | — | Altera Classic EPLD - EP910 |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Logic Array Blocks | — | 2 (12 macrocells each) |
| Maximum Toggle Frequency (fMAX) | — | 25 MHz |
| User I/O Pins | — | 36 |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| Lead-Free Status | — | Not applicable |