EP910PC-15 vs EP910DC-15 Comparaison
Comparaison détaillée côte à côte de EP910PC-15 par Altera et EP910DC-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910PC-15 | EP910DC-15 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $12,80 | $10,75 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Usable Gates | 900 | — |
| Macrocells | 24 | 24 |
| Maximum Pin-to-Pin Delay (tpd) | 15 ns | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (typical) |
| Supply Current (Icc) | 80 mA typical | — |
| Dedicated Inputs | 10 | 12 |
| Dedicated I/O Pins | 12 | — |
| Température de fonctionnement | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Boîtier | 24-pin PDIP (PDIP-24, 0.300 inch) | 24-pin ceramic DIP (DC) |
| Type de montage | Through-Hole | Through-Hole |
| Process Technology | CMOS, UV-erasable | — |
| Programming Method | Altera Logic Programmer card | — |
| Statut RoHS | [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] | [DATA_NEEDED: not explicitly stated in verified data] |
| Niveau MSL | Not applicable (through-hole) | [DATA_NEEDED: MSL level] |
| Device Density | — | 900 usable gates |
| Logic Elements | — | [DATA_NEEDED: exact LE count] |
| Bidirectional I/O Pins | — | 12 |
| Flip-Flops | — | 10 |
| Product Terms per Macrocells | — | 24 |
| Maximum Propagation Delay (tPD) | — | 15 ns |
| Speed Grade | — | 15 |
| Technology | — | CMOS EPROM, UV-erasable |