EP910PC30T vs EP910PC-25 Comparaison
Comparaison détaillée côte à côte de EP910PC30T par Altera et EP910PC-25 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910PC30T | EP910PC-25 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,85 | $16,92 |
| Family | Altera Classic EPLD | — |
| Device Series | EP910 | — |
| Number of Macrocells | 24 | — |
| Number of I/O Pins | 24 | — |
| Number of Dedicated Inputs | 12 | — |
| Maximum Product Terms | 240 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Clock Frequency (fMAX) | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V +/- 10% |
| Process Technology | CMOS | — |
| Programmable Logic Architecture | PAL-type sum-of-products, EPLD | — |
| Boîtier | 24-pin PDIP (PC) | PDIP-24 (Plastic DIP) |
| Type de montage | Through-Hole (THT) | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Speed Grade | -30 (30 ns tPD) | — |
| Programming Technology | EPROM (OTP in plastic package, UV-erasable in windowed package) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Nombre de broches | 24 | 24 |
| Product Family | — | Classic EPLD |
| Usable Gates | — | 900 |
| Integration Gates (typical) | — | 4800 |
| Macrocells | — | 24 |
| Pin-to-Pin Delay (tPD) | — | 25 ns |
| Maximum Operating Frequency (fMAX) | — | 33.3 MHz |
| Technology | — | CMOS EPROM |
| Dedicated Inputs | — | 10 |
| Dedicated I/O Pins | — | 12 |
| TTL Compatibility | — | 100% TTL emulation |
| Erasure Method | — | Not erasable in plastic package (windowless) |