EPC1064LC20 vs EPC144ILC20 Comparaison
Comparaison détaillée côte à côte de EPC1064LC20 par Intel et EPC144ILC20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1064LC20 | EPC144ILC20 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,85 | $9,95 |
| Taille de mémoire | 65 kb (65,536 bits) | 440,800 bit (54 KB) |
| Type de mémoire | OTP Configuration PROM (Flash-based, one-time programmable) | OTP CMOS Configuration EPROM (UV-erasable, factory OTP-programmed) |
| Programmable Type | OTP (One-Time Programmable) | — |
| Interface | Serial (Passive Serial / daisy-chain compatible) | Serial (Altera FLEX/MAX configuration - DCLK / DATA0 / nCONFIG / nSTATUS) |
| Access Time | 90 ns (approximately 10 MHz) | — |
| Supply Voltage (Operating) | 4.5 V to 5.5 V | — |
| Supply Voltage (Nominal) | 5 V | — |
| Température de fonctionnement | 0 C to 70 C (Commercial) | — |
| Boîtier / Format | 20-PLCC (LC) J-lead, 9x9 mm | — |
| No. of Terminals | 20 | — |
| Terminal Finish | Tin/Lead (Sn/Pb) | — |
| Package Code | QCCJ (PLCC-20 J-lead) | — |
| Package Shape | Square | — |
| Compatible Altera FPGA Families | ACEX 1K, APEX 20K, APEX II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Configuration Modes Supported | Passive Serial (PS) with FPP up to 100 MHz on newer FPGAs | — |
| Statut RoHS | Non-compliant (Sn/Pb finish) | [DATA_NEEDED: RoHS compliance] |
| Niveau MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Lead-Free | No (Sn/Pb terminal finish) | — |
| Manufacturer | — | Altera (now Intel) |
| Part Family | — | EPC144 - Configuration EPROM |
| Supply Voltage VCC | — | 5 V (nominal) |
| Boîtier | — | PLCC-20 (Plastic Leaded Chip Carrier, JEDEC MS-018) |
| Plage de température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Configuration Mode | — | Master Serial / daisy-chain JTAG-style |
| Programmability | — | One-Time-Programmable (factory programmed by Altera with user bitstream) |
| JTAG Support | — | Yes (TDI/TDO pins for ByteBlasterMV / USB-Blaster ISP) |
| Compatible FPGAs | — | Altera EPF8282, EPF8452, EPF10K-series Classic FPGAs |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Type de montage | — | Surface Mount (PLCC-20 socket or SMT land pattern) |