EPC1064LC20 vs EPC144L20 Comparaison
Comparaison détaillée côte à côte de EPC1064LC20 par Intel et EPC144L20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1064LC20 | EPC144L20 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | Memory ICs | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,85 | $16,20 |
| Taille de mémoire | 65 kb (65,536 bits) | — |
| Type de mémoire | OTP Configuration PROM (Flash-based, one-time programmable) | OTP (One-Time Programmable) Configuration PROM |
| Programmable Type | OTP (One-Time Programmable) | — |
| Interface | Serial (Passive Serial / daisy-chain compatible) | Altera serial configuration (4-pin: nCS, DCLK, DATA, nCONFIG) |
| Access Time | 90 ns (approximately 10 MHz) | — |
| Supply Voltage (Operating) | 4.5 V to 5.5 V | — |
| Supply Voltage (Nominal) | 5 V | — |
| Température de fonctionnement | 0 C to 70 C (Commercial) | -40C to +85C (industrial) |
| Boîtier / Format | 20-PLCC (LC) J-lead, 9x9 mm | — |
| No. of Terminals | 20 | — |
| Terminal Finish | Tin/Lead (Sn/Pb) | — |
| Package Code | QCCJ (PLCC-20 J-lead) | — |
| Package Shape | Square | — |
| Compatible Altera FPGA Families | ACEX 1K, APEX 20K, APEX II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Configuration Modes Supported | Passive Serial (PS) with FPP up to 100 MHz on newer FPGAs | — |
| Statut RoHS | Non-compliant (Sn/Pb finish) | [DATA_NEEDED: RoHS status] |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Lead-Free | No (Sn/Pb terminal finish) | [DATA_NEEDED: lead-free status] |
| Memory Density | — | 440,800 bits |
| Organisation de la mémoire | — | 440,800 words × 1 bit (serial) |
| Tension d'alimentation | — | 3.3 V |
| Package Type | — | 20-pin LCC (Leadless Chip Carrier) |
| Programming Method | — | OTP anti-fuse (single program cycle) |
| Compatible FPGA Families | — | FLEX 10K, ACEX 1K, APEX 20K, Mercury (legacy Altera) |
| Type de montage | — | Surface Mount / Socket |
| Configuration Clock | — | [DATA_NEEDED: max DCLK frequency] |
| Programming Voltage | — | [DATA_NEEDED: VPP] |
| Manufacturer | — | Altera Corporation (now Intel PSG) |