EPC1213LC20 vs EPC144ILC20 Comparaison
Comparaison détaillée côte à côte de EPC1213LC20 par Intel et EPC144ILC20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1213LC20 | EPC144ILC20 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | EEPROM | Memory ICs |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,40 | $9,95 |
| Type de mémoire | OTP Configuration PROM (Flash-based) | OTP CMOS Configuration EPROM (UV-erasable, factory OTP-programmed) |
| Taille de mémoire | 212 Kbit | 440,800 bit (54 KB) |
| Interface | Serial (Altera FPGA configuration protocol) | Serial (Altera FLEX/MAX configuration - DCLK / DATA0 / nCONFIG / nSTATUS) |
| Maximum Configuration Clock | 6 MHz | — |
| Supply Voltage (Core) | 5.0 V | — |
| I/O Voltage Tolerance | 3.3 V / 5.0 V | — |
| Programmability | One-Time Programmable (OTP) via IEEE 1149.1 JTAG | One-Time-Programmable (factory programmed by Altera with user bitstream) |
| In-System Programmability | Yes (5.0 V and 3.3 V ISP) | — |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Compression Support | Yes (FPGA decompresses bitstream during load) | — |
| Température de fonctionnement | 0C to +70C (Commercial) | — |
| Boîtier | 20-PLCC (J-lead, 9x9 mm) | PLCC-20 (Plastic Leaded Chip Carrier, JEDEC MS-018) |
| Package Code | QCCJ | — |
| Type de montage | Surface Mount | Surface Mount (PLCC-20 socket or SMT land pattern) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance] |
| Manufacturer | — | Altera (now Intel) |
| Part Family | — | EPC144 - Configuration EPROM |
| Supply Voltage VCC | — | 5 V (nominal) |
| Plage de température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Configuration Mode | — | Master Serial / daisy-chain JTAG-style |
| JTAG Support | — | Yes (TDI/TDO pins for ByteBlasterMV / USB-Blaster ISP) |
| Compatible FPGAs | — | Altera EPF8282, EPF8452, EPF10K-series Classic FPGAs |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |