EPC144ILC20 vs EPC1213LC20 Comparaison
Comparaison détaillée côte à côte de EPC144ILC20 par Intel et EPC1213LC20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC144ILC20 | EPC1213LC20 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | Memory ICs | EEPROM |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $7,40 |
| Manufacturer | Altera (now Intel) | — |
| Part Family | EPC144 - Configuration EPROM | — |
| Type de mémoire | OTP CMOS Configuration EPROM (UV-erasable, factory OTP-programmed) | OTP Configuration PROM (Flash-based) |
| Taille de mémoire | 440,800 bit (54 KB) | 212 Kbit |
| Interface | Serial (Altera FLEX/MAX configuration - DCLK / DATA0 / nCONFIG / nSTATUS) | Serial (Altera FPGA configuration protocol) |
| Supply Voltage VCC | 5 V (nominal) | — |
| Boîtier | PLCC-20 (Plastic Leaded Chip Carrier, JEDEC MS-018) | 20-PLCC (J-lead, 9x9 mm) |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Configuration Mode | Master Serial / daisy-chain JTAG-style | — |
| Programmability | One-Time-Programmable (factory programmed by Altera with user bitstream) | One-Time Programmable (OTP) via IEEE 1149.1 JTAG |
| JTAG Support | Yes (TDI/TDO pins for ByteBlasterMV / USB-Blaster ISP) | — |
| Compatible FPGAs | Altera EPF8282, EPF8452, EPF10K-series Classic FPGAs | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Type de montage | Surface Mount (PLCC-20 socket or SMT land pattern) | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Maximum Configuration Clock | — | 6 MHz |
| Supply Voltage (Core) | — | 5.0 V |
| I/O Voltage Tolerance | — | 3.3 V / 5.0 V |
| In-System Programmability | — | Yes (5.0 V and 3.3 V ISP) |
| Supported FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Compression Support | — | Yes (FPGA decompresses bitstream during load) |
| Température de fonctionnement | — | 0C to +70C (Commercial) |
| Package Code | — | QCCJ |