EPC16U188N vs EPC16UC88 Comparaison
Comparaison détaillée côte à côte de EPC16U188N par Altera et EPC16UC88 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC16U188N | EPC16UC88 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | Memory ICs |
| Statut du cycle de vie | Actif | Unknown |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $19,95 | $0,00 |
| Type de mémoire | In-System Programmable Configuration PROM | — |
| Memory Density | 16 Mbit | — |
| FPGA Family Support | Altera Cyclone, Stratix, APEX series | — |
| Configuration Modes | FPP, PS, AS, JTAG | — |
| Decompression | Built-in (multiplier 1x, 2x, 4x) | — |
| Interface | Parallel Flash Interface (PIA), JTAG (IEEE 1149.1) | — |
| I/O Voltage Support | 1.8V, 2.5V, 3.3V, 5.0V | — |
| Endurance | 100,000 erase/program cycles | — |
| Data Retention | 20 years | — |
| Boîtier | 188-ball Ultra FineLine BGA (UBGA) | 88-UBGA (11x8) |
| Température de fonctionnement | -40C to +85C | [DATA_NEEDED: operating temperature] |
| Type de montage | Surface Mount (BGA) | Surface mount |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Niveau MSL | 3 (168 hours) | — |
| Device Type | — | In-system programmable configuration PROM for FPGAs |
| Configuration Memory Capacity | — | 16 Mb |
| Tension d'alimentation | — | 3.3 V core and I/O |
| Package Family | — | UBGA |
| In-System Programmability | — | IEEE Std. 1532 compatible |
| Programming Language Support | — | Jam Standard Test and Programming Language (STAPL) |
| JTAG Boundary Scan | — | Supported |
| nINIT_CONF Function | — | Allows private JTAG instruction to start FPGA configuration |
| Configuration Architecture | — | Configuration controller and flash memory |
| FPGA Configuration Use | — | Automatic configuration after power-up or system initialization |
| Data Output | — | Configuration data output controlled by OE and nCS |
| Output Control | — | OE and nCS control tri-state buffer and address counter |
| Package Dimensions | — | 11 mm x 8 mm |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| Output Current | — | [DATA_NEEDED: output current] |
| Configuration Frequency | — | [DATA_NEEDED: configuration frequency] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |