EPC16UC80 vs EPC16UC88N Comparaison
Comparaison détaillée côte à côte de EPC16UC80 par Altera et EPC16UC88N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC16UC80 | EPC16UC88N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | Memory ICs | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $11,75 | $9,75 |
| Memory Density | 16 Mbit | — |
| Device Family | EPC4 / EPC8 / EPC16 Enhanced Configuration Device | — |
| Configuration Memory Sections | 8 (multi-boot capable) | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (typical 3.3 V) | — |
| Configuration Clock (DCLK) | Up to 33 MHz (FPP mode) | — |
| Configuration Modes | FPP, PS, JTAG | Passive Serial (PS), Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), JTAG |
| Interface | Parallel data + DCLK + nSTATUS + nCONFIG + CONFIG_DONE | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Endurance | 100,000 erase/program cycles (per datasheet) | — |
| Température de fonctionnement | -40 C to +85 C (industrial) | 0 °C to +70 °C |
| Boîtier | 80-ball UBGA (Ultra FineLine BGA), 11x8 mm | — |
| Type de montage | Surface Mount | Surface Mount |
| Supported Target FPGAs | Stratix/II/III/GX, Cyclone/II/III, APEX 20K/II/IIE, Mercury | — |
| Lead-Free / RoHS | Compliant per Altera product page | Lead-Free (per datasheet) |
| Multi-Device Daisy-Chain | Yes | — |
| Taille de mémoire | — | 16 Mbit (16,777,216 bits) |
| Programmable Type | — | In System Programmable |
| Supply Voltage (Vcc) | — | 3.0 V to 3.6 V |
| On-Chip Decompression | — | Yes (Altera proprietary) |
| Boîtier / Format | — | 88-UBGA (11x8 mm) / 88-LFBGA |
| Nombre de broches | — | 88 |
| Bus-Hold on Data Lines | — | Yes |
| Standby Mode | — | Yes (reduced power consumption) |
| JTAG Boundary Scan | — | Yes (IEEE 1149.1) |
| Programming Interface | — | JTAG (in-system) / Serial (in-system) |
| On-Chip Oscillator | — | Yes (internal configuration clock) |
| Packaging | — | Tray |