EPC16UC88AB vs EPC16UC88 Comparaison
Comparaison détaillée côte à côte de EPC16UC88AB par Altera et EPC16UC88 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC16UC88AB | EPC16UC88 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Actif | Unknown |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $17,40 | $0,00 |
| Type de mémoire | Non-volatile Flash Configuration PROM | — |
| Taille de mémoire | 16 Mbit | — |
| Configuration Interface | Passive Serial (PS), Active Serial (AS), JTAG (IEEE 1149.1) | — |
| In-System Programmable | Yes (via JTAG) | — |
| Multi-Boot Support | Yes | — |
| Remote System Upgrade | Yes | — |
| Page Mode | Yes (fast parallel configuration) | — |
| Operating Voltage | 3.3 V | — |
| Boîtier | 88-LFBGA (FineLine BGA) | 88-UBGA (11x8) |
| Package Code | UC88 | — |
| Compatible FPGA Families | Altera Stratix, Cyclone, Arria series | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Statut RoHS | Compliant (lead-free) | [DATA_NEEDED: RoHS status] |
| Type de montage | Surface Mount | Surface mount |
| Datasheet Document | EPC4, EPC8 & EPC16 Enhanced Configuration Devices Data Sheet | — |
| Device Type | — | In-system programmable configuration PROM for FPGAs |
| Configuration Memory Capacity | — | 16 Mb |
| Tension d'alimentation | — | 3.3 V core and I/O |
| Package Family | — | UBGA |
| In-System Programmability | — | IEEE Std. 1532 compatible |
| Programming Language Support | — | Jam Standard Test and Programming Language (STAPL) |
| JTAG Boundary Scan | — | Supported |
| nINIT_CONF Function | — | Allows private JTAG instruction to start FPGA configuration |
| Configuration Architecture | — | Configuration controller and flash memory |
| FPGA Configuration Use | — | Automatic configuration after power-up or system initialization |
| Data Output | — | Configuration data output controlled by OE and nCS |
| Output Control | — | OE and nCS control tri-state buffer and address counter |
| Package Dimensions | — | 11 mm x 8 mm |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature] |
| Output Current | — | [DATA_NEEDED: output current] |
| Configuration Frequency | — | [DATA_NEEDED: configuration frequency] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |