EPC16UC88N vs EPC16UC88T Comparaison
Comparaison détaillée côte à côte de EPC16UC88N par Altera et EPC16UC88T par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC16UC88N | EPC16UC88T |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | EEPROM |
| Statut du cycle de vie | NRND | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,75 | $9,95 |
| Taille de mémoire | 16 Mbit (16,777,216 bits) | — |
| Programmable Type | In System Programmable | — |
| Supply Voltage (Vcc) | 3.0 V to 3.6 V | — |
| Configuration Modes | Passive Serial (PS), Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), JTAG | — |
| On-Chip Decompression | Yes (Altera proprietary) | — |
| Boîtier / Format | 88-UBGA (11x8 mm) / 88-LFBGA | — |
| Nombre de broches | 88 | — |
| Température de fonctionnement | 0 °C to +70 °C | — |
| Bus-Hold on Data Lines | Yes | — |
| Standby Mode | Yes (reduced power consumption) | — |
| JTAG Boundary Scan | Yes (IEEE 1149.1) | — |
| Programming Interface | JTAG (in-system) / Serial (in-system) | — |
| On-Chip Oscillator | Yes (internal configuration clock) | — |
| Lead-Free / RoHS | Lead-Free (per datasheet) | — |
| Type de montage | Surface Mount | — |
| Packaging | Tray | — |
| Type de mémoire | — | Non-volatile Flash configuration PROM (in-system programmable) |
| Memory Density | — | 16 Mbit (2,097,152 x 8 bits) |
| Configuration Interface | — | Serial (4-wire: nCS, DCLK, DATA, nINIT_CONF_DONE) |
| Maximum DCLK Frequency | — | 33 MHz |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V (3.3 V nominal) |
| Plage de température de fonctionnement | — | -40 C to +85 C (industrial) |
| Boîtier | — | 88-ball UBGA, 11 mm x 8 mm |
| In-System Programming | — | IEEE Std 1149.1 (JTAG) |
| Cascade Support | — | Yes (for higher density multi-PROM chains) |
| MSEL Compatibility | — | FPP / PS configuration modes (3.3 V legacy) |
| Compatible FPGA Families | — | Cyclone, Cyclone II, Stratix, Stratix II, Stratix III, Stratix IV, Arria GX |
| Family Density Step | — | Largest member of EPC4 / EPC8 / EPC16 family |
| Statut RoHS | — | [DATA_NEEDED: RoHS] |
| Niveau MSL | — | [DATA_NEEDED: MSL] |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |
| Open-Drain nINIT_CONF_DONE | — | Yes |