EPC1LC20-W vs EPC144ILC20 Comparaison
Comparaison détaillée côte à côte de EPC1LC20-W par Altera et EPC144ILC20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1LC20-W | EPC144ILC20 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,85 | $9,95 |
| Type de mémoire | OTP (One-Time Programmable) Configuration PROM | OTP CMOS Configuration EPROM (UV-erasable, factory OTP-programmed) |
| Taille de mémoire | 1 Mbit | 440,800 bit (54 KB) |
| Configuration Clock (DCLK) | 8 MHz maximum | — |
| Tension d'alimentation | 3.3 V and 5.0 V | — |
| Interface | Altera serial configuration (DCLK / DATA / nCONFIG / nSTATUS) | Serial (Altera FLEX/MAX configuration - DCLK / DATA0 / nCONFIG / nSTATUS) |
| In-System Programming | Yes - IEEE 1149.1 (JTAG) ISP at 3.3 V / 5.0 V | — |
| Boîtier | 20-PLCC J-lead (9x9 mm) | PLCC-20 (Plastic Leaded Chip Carrier, JEDEC MS-018) |
| Lead Finish | Pb-free (matte tin) - "-W" suffix | — |
| Daisy-Chain Support | Yes - multiple EPC1 / EPC2 devices cascade to program larger FPGAs | — |
| Compression Support | Yes - stores compressed Altera FPGA bitstreams | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Programming Cycles | 1 (OTP) | — |
| Target FPGA Families | Cyclone, FLEX 6000 / 10K / 10KE, ACEX 1K, APEX 20K, Mercury | — |
| Statut RoHS | Compliant (Pb-free -W finish) | [DATA_NEEDED: RoHS compliance] |
| Type de montage | Surface Mount (PLCC socket or direct solder) | Surface Mount (PLCC-20 socket or SMT land pattern) |
| Manufacturer | — | Altera (now Intel) |
| Part Family | — | EPC144 - Configuration EPROM |
| Supply Voltage VCC | — | 5 V (nominal) |
| Configuration Mode | — | Master Serial / daisy-chain JTAG-style |
| Programmability | — | One-Time-Programmable (factory programmed by Altera with user bitstream) |
| JTAG Support | — | Yes (TDI/TDO pins for ByteBlasterMV / USB-Blaster ISP) |
| Compatible FPGAs | — | Altera EPF8282, EPF8452, EPF10K-series Classic FPGAs |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |