EPC20LC20U vs EPC20LI20N Comparaison
Comparaison détaillée côte à côte de EPC20LC20U par Intel et EPC20LI20N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC20LC20U | EPC20LI20N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | Memory ICs | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,20 | $17,50 |
| Manufacturer | Altera Corporation (now Intel) | — |
| Fonction | FPGA Configuration Device (Serial Configuration PROM) | — |
| Type de mémoire | Non-volatile configuration memory | EPROM (UV-erasable, in-system programmable) |
| Configuration Interface | Serial (DATA, DCLK, nCS, nINIT_CONF, nSTATUS, OE) | — |
| Operating Voltage | 5.0 V (typical) | — |
| Absolute Maximum DC Input | -0.3 V to 7.0 V | — |
| Transient Input Tolerance | -2.0 V undershoot to 7.0 V overshoot (<100 mA, <20 ns) | — |
| Package Type | PLCC-20 (J-lead, plastic leaded chip carrier) | — |
| Nombre de broches | 20 | — |
| Type de montage | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket or direct solder) |
| Compatible FPGA Families | Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX, ACEX, early Cyclone | — |
| In-System Programming | Supported via JTAG / Quartus programmer | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Plage de température de fonctionnement | [DATA_NEEDED: industrial/commercial grade] | — |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free status] | — |
| Statut du cycle de vie | Obsolete / Last-time-buy in distribution | — |
| Taille de mémoire | — | 1.6 Mbit (65,536 x 1-bit words, approx. 200 Kbyte) |
| Interface | — | Serial (4-pin Altera Passive Serial: DCLK, DATA0, nCONFIG, nSTATUS) |
| Tension d'alimentation | — | 3.3 V (5.0 V compatible variant in same family) |
| Configuration Clock | — | Up to 10 MHz |
| Target FPGA Families | — | APEX II, APEX 20K/KC/KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA |
| Boîtier | — | 20-pin PLCC (9x9 mm, JEDEC MS-018) |
| Programming Interface | — | IEEE 1532 / JTAG (in-system) |
| Température de fonctionnement | — | -40C to +85C (industrial) |
| Standby Current | — | [DATA_NEEDED: standby current uA] |
| Active Configuration Current | — | [DATA_NEEDED: ICC active mA] |
| Programming Voltage | — | [DATA_NEEDED: VPP] |
| Programming Cycles | — | [DATA_NEEDED: endurance cycles] |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| Multi-Device Daisy-Chain | — | Supported via nCASC pin |