EPC21C20U vs EPC27C32N Comparaison
Comparaison détaillée côte à côte de EPC21C20U par Intel et EPC27C32N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC21C20U | EPC27C32N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | Memory ICs | FPGA & CPLD |
| Statut du cycle de vie | Actif | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,85 | $9,95 |
| Manufacturer | Intel / Altera | Intel (formerly Altera) |
| Product Type | Configuration Device (Boot Flash) | — |
| Taille de mémoire | 20 Mbit (2.5 Mbyte) | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | — |
| Interface | Altera/Intel Passive Serial (PS) and Active Serial (AS), JTAG (IEEE 1149.1) | — |
| Boîtier | 20-pin UBGA (Ultra FineLine BGA) - also called 20-pin FBGA | PLCC-20 |
| In-System Programmability | Yes (via JTAG) | — |
| Bitstream Compression Support | Yes | — |
| Cascade (Multi-Device) Support | Yes (nCASC daisy-chain) | — |
| Supported FPGA Families | APEX II, APEX 20KE, APEX 20KC, Mercury, Stratix, Cyclone, ACEX 1K, FLEX 10KE | — |
| Température de fonctionnement | -40 C to +85 C (industrial) | [DATA_NEEDED: industrial/commercial] |
| Type de montage | Surface Mount (BGA) | Surface Mount (PLCC) |
| Statut RoHS | Compliant (per Intel/Altera product page) | [DATA_NEEDED: depends on date code; older N suffix often Pb-free] |
| Lead-Free | Yes | — |
| Configuration Mode | Passive Serial (PS) / Active Serial (AS) via FPGA controller | — |
| Type de mémoire | — | Configuration EPROM (non-volatile) |
| Density | — | 32 Mbit |
| Configuration Interface | — | Serial (Altera Passive Serial / Active Serial / JTAG) |
| Tension d'alimentation | — | [DATA_NEEDED: VCC nominal] |
| Supply Voltage Range | — | [DATA_NEEDED: VCC min/max] |
| Programmability | — | In-system programmable (IEEE 1532 / JTAG) |
| Package Code Suffix | — | N = PLCC-20 |
| Multi-device Daisy-chain | — | Yes (page-mode supported) |
| Reconfiguration | — | Software-controllable / on-the-fly via JTAG |
| Lead-free | — | [DATA_NEEDED] |
| Family | — | EPC Enhanced Configuration Device |
| Compatible FPGA Targets | — | Altera Stratix, Cyclone, Arria, FLEX, ACEX series |