EPC27C32N vs EPC27TC32N Comparaison
Comparaison détaillée côte à côte de EPC27C32N par Altera et EPC27TC32N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC27C32N | EPC27TC32N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Unknown |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $0,00 |
| Type de mémoire | Configuration EPROM (non-volatile) | — |
| Density | 32 Mbit | — |
| Configuration Interface | Serial (Altera Passive Serial / Active Serial / JTAG) | [DATA_NEEDED: configuration interface] |
| Tension d'alimentation | [DATA_NEEDED: VCC nominal] | — |
| Supply Voltage Range | [DATA_NEEDED: VCC min/max] | — |
| Programmability | In-system programmable (IEEE 1532 / JTAG) | — |
| Boîtier | PLCC-20 | [DATA_NEEDED: package] |
| Package Code Suffix | N = PLCC-20 | — |
| Type de montage | Surface Mount (PLCC) | [DATA_NEEDED: mounting type] |
| Température de fonctionnement | [DATA_NEEDED: industrial/commercial] | [DATA_NEEDED: operating temperature] |
| Multi-device Daisy-chain | Yes (page-mode supported) | — |
| Reconfiguration | Software-controllable / on-the-fly via JTAG | — |
| Statut RoHS | [DATA_NEEDED: depends on date code; older N suffix often Pb-free] | [DATA_NEEDED: RoHS status] |
| Lead-free | [DATA_NEEDED] | — |
| Family | EPC Enhanced Configuration Device | — |
| Compatible FPGA Targets | Altera Stratix, Cyclone, Arria, FLEX, ACEX series | — |
| Manufacturer | Intel (formerly Altera) | Altera |
| Product Type | — | Configuration device for SRAM-based LUT devices |
| Target Logic Type | — | SRAM-based LUT devices |
| Configuration Memory Capacity | — | [DATA_NEEDED: configuration memory capacity] |
| Programming Mode | — | [DATA_NEEDED: programming mode] |
| Supported FPGA Families | — | [DATA_NEEDED: supported FPGA families] |
| Operating Voltage | — | [DATA_NEEDED: operating voltage] |
| Clock Frequency | — | [DATA_NEEDED: clock frequency] |
| Configuration Startup Time | — | [DATA_NEEDED: configuration startup time] |
| Nombre de broches | — | [DATA_NEEDED: pin count] |
| Package Dimensions | — | [DATA_NEEDED: package dimensions] |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Halogen-Free Status | — | [DATA_NEEDED: halogen-free status] |
| Conflict-Mineral Status | — | [DATA_NEEDED: conflict-mineral status] |