EPC27TC32N vs EPC2TC32N Comparaison

Comparaison détaillée côte à côte de EPC27TC32N par Altera et EPC2TC32N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.

Comparaison des spécifications

Paramètre EPC27TC32N EPC2TC32N
Marque Altera Altera
Catégorie FPGA & CPLD Memory ICs
Statut du cycle de vie Unknown Obsolete
Statut du stock In Stock In Stock
Prix unitaire (USD) $0,00 $9,20
Product Type Configuration device for SRAM-based LUT devices —
Manufacturer Altera Altera (now Intel)
Target Logic Type SRAM-based LUT devices —
Configuration Memory Capacity [DATA_NEEDED: configuration memory capacity] —
Configuration Interface [DATA_NEEDED: configuration interface] —
Programming Mode [DATA_NEEDED: programming mode] —
Supported FPGA Families [DATA_NEEDED: supported FPGA families] ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
Operating Voltage [DATA_NEEDED: operating voltage] —
Clock Frequency [DATA_NEEDED: clock frequency] —
Configuration Startup Time [DATA_NEEDED: configuration startup time] —
Température de fonctionnement [DATA_NEEDED: operating temperature] 0 °C to +70 °C (Commercial)
Boîtier [DATA_NEEDED: package] 32-TQFP (7x7 mm)
Nombre de broches [DATA_NEEDED: pin count] —
Type de montage [DATA_NEEDED: mounting type] Surface Mount
Package Dimensions [DATA_NEEDED: package dimensions] —
Statut RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
REACH Status [DATA_NEEDED: REACH status] —
AEC-Q100 Qualification [DATA_NEEDED: AEC-Q100 qualification] —
Lead-Free Status [DATA_NEEDED: lead-free status] —
Halogen-Free Status [DATA_NEEDED: halogen-free status] —
Conflict-Mineral Status [DATA_NEEDED: conflict-mineral status] —
Type de mémoire — Flash Configuration PROM
Taille de mémoire — 1.6 Mbit
Programmable Type — In System Programmable (ISP)
Interface — JTAG (IEEE 1149.1) + serial/parallel
Supply Voltage - VCCINT — 3.0 V to 3.6 V or 4.75 V to 5.25 V
Supply Voltage - VCCIO — 3.0 V to 3.6 V or 4.75 V to 5.25 V
Max Configuration Clock — 8 MHz
Daisy-Chain Support — Yes (multi-FPGA cascade)
JTAG Compliance — IEEE 1149.1
Configuration Mode — Serial (AS) or Parallel (PS/AP)

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