EPC2LI20 vs EPC20LI20N Comparaison
Comparaison détaillée côte à côte de EPC2LI20 par Altera et EPC20LI20N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC2LI20 | EPC20LI20N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | Memory ICs | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $5,95 | $17,50 |
| Taille de mémoire | 1.6 Mb (1,572,864 bits) | 1.6 Mbit (65,536 x 1-bit words, approx. 200 Kbyte) |
| Type de mémoire | Flash (in-system programmable) | EPROM (UV-erasable, in-system programmable) |
| Programmable Type | In System Programmable (ISP) | — |
| Fonction | Configuration PROM for SRAM-based FPGAs | — |
| Supply Voltage - Operating | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) | — |
| Température de fonctionnement | -40 C to +85 C (Industrial) | -40C to +85C (industrial) |
| Boîtier / Format | 20-PLCC (J-lead, 9x9 mm) | — |
| Type de montage | Surface Mount (PLCC socket-compatible) | Surface Mount (PLCC socket or direct solder) |
| Configuration Interface | Serial or Byte-wide (parallel) | — |
| Decompression | On-chip (supports compressed bitstreams) | — |
| JTAG / ISP Interface | IEEE 1532 (TCK, TMS, TDI, TDO) | — |
| Multi-Device Support | Yes (daisy-chain configuration) | — |
| User-Accessible Memory | Yes (unused flash available to user logic) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Interface | — | Serial (4-pin Altera Passive Serial: DCLK, DATA0, nCONFIG, nSTATUS) |
| Tension d'alimentation | — | 3.3 V (5.0 V compatible variant in same family) |
| Configuration Clock | — | Up to 10 MHz |
| Target FPGA Families | — | APEX II, APEX 20K/KC/KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA |
| Boîtier | — | 20-pin PLCC (9x9 mm, JEDEC MS-018) |
| Programming Interface | — | IEEE 1532 / JTAG (in-system) |
| Standby Current | — | [DATA_NEEDED: standby current uA] |
| Active Configuration Current | — | [DATA_NEEDED: ICC active mA] |
| Programming Voltage | — | [DATA_NEEDED: VPP] |
| Programming Cycles | — | [DATA_NEEDED: endurance cycles] |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| Multi-Device Daisy-Chain | — | Supported via nCASC pin |