EPC2TC32UCF48 vs EPC2TC32 Comparaison
Comparaison détaillée côte à côte de EPC2TC32UCF48 par Intel et EPC2TC32 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC2TC32UCF48 | EPC2TC32 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,85 | $14,50 |
| Type de mémoire | Non-volatile configuration PROM (CMOS Flash-based) | — |
| Memory Density | 1.6 Mbit (1.6 Mb / 32 Mbit raw) | — |
| Memory Configuration | Serial configuration bitstream storage | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | — |
| Supply Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (bank-level) | — |
| Output Drive Current (VCCIO) | [DATA_NEEDED: IOH/IOL at 3.3 V VCCIO] | — |
| Programming Interface | IEEE Std. 1149.1 JTAG (in-system programmable) | — |
| Configuration Interface | Altera serial PROM interface (DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE) | — |
| Supported Configuration Modes | FPP, AS, PS, JTAG (mode dependent on target FPGA MSEL pins) | — |
| Daisy Chain Support | Yes (multi-device cascade for >16 Mbit FPGAs) | — |
| Maximum Cascaded Capacity | Up to 16 Mbit total across chain | — |
| Température de fonctionnement | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Boîtier | 48-pin TQFP (7x7 mm) | 32-TQFP (7x7 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | [DATA_NEEDED: confirm RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Lead Free | [DATA_NEEDED: confirm lead-free] | — |
| Taille de mémoire | — | 1.6 Mb |
| Device Type | — | In-System Programmable Configuration PROM |
| Tension d'alimentation | — | 3.3 V |
| Interface | — | Serial, JTAG, FPP, PS |
| Programmability | — | In-System Programmable (ISP) via JTAG |
| Nombre de broches | — | 32 |
| Supported FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Configuration Modes | — | FPP, PS, JTAG |
| Internal Oscillator | — | Yes (DCLK generation) |
| Cascade Support | — | Yes (via nCS and RDYnBUSY) |
| Memory Technology | — | CMOS non-volatile |