EPC8QI100 vs EPC160I100 Comparaison
Comparaison détaillée côte à côte de EPC8QI100 par Intel et EPC160I100 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC8QI100 | EPC160I100 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,85 | $15,95 |
| Type de mémoire | Flash (NOR, Enhanced Configuration PROM) | — |
| Taille de mémoire | 8 Mbit | — |
| Supply Voltage (Core) | 3.3 V | — |
| Supply Voltage (I/O) | 3.3 V | — |
| Interface | Altera FPGA configuration serial/parallel (FPP) + JTAG (IEEE 1149.1) | — |
| In-System Programmability | IEEE Std. 1532 compliant | — |
| Programming Language | Jam STAPL | — |
| Boundary Scan | JTAG boundary-scan test supported | — |
| Data Compression | Yes (increases effective capacity) | — |
| Configuration Controller | On-chip, dedicated to Altera FPGAs | — |
| Initiate-Configuration Pin | nINIT_CONF (private JTAG instruction) | — |
| Température de fonctionnement | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| Boîtier | 100-PQFP (20 x 14 mm) | QFP-100 (14x14 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Compatible FPGAs | Stratix, Stratix II, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, Cyclone, Cyclone II, Arria GX, Stratix GX, Stratix II GX | — |
| Statut RoHS | Non-compliant (legacy PQFP, lead-bearing) | [DATA_NEEDED: RoHS] |
| Manufacturer | — | Altera (Intel Programmable Solutions Group) |
| Device Type | — | Enhanced Configuration Device (EPC) |
| Configuration Memory Size | — | 1.6 Mbit |
| Supported FPGA Families | — | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 10KE |
| Supply Voltage (VCC) | — | 3.3 V |
| I/O Tolerance | — | 5.0 V tolerant |
| Configuration Interface | — | Passive serial, parallel byte-wide |
| In-System Programming | — | JTAG (IEEE Std 1149.1) |
| Program/Erase Cycles | — | 10,000 cycles per sector |
| Sector Size | — | 32 KB |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |