EPF10K100BQC240-2 vs EPF10K100EQC240-2N Comparaison
Comparaison détaillée côte à côte de EPF10K100BQC240-2 par Altera et EPF10K100EQC240-2N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF10K100BQC240-2 - 100K Gate FLEX-10KE FPGA, 240-PQFP | Altera
EPF10K100BQC240-2 ⚠ Dernier achatAltera
EPF10K100EQC240-2N - 100K Gates FLEX-10KE FPGA, 240-PQFP | Altera
EPF10K100EQC240-2N ObsoleteComparaison des spécifications
| Paramètre | EPF10K100BQC240-2 | EPF10K100EQC240-2N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $115,00 | $18,40 |
| Series | FLEX-10KE | FLEX 10KE |
| Family | FLEX-10K (embedded PLD) | — |
| Logic Elements / Cells | 4,992 | 4992 |
| Total System Gates | 100,000 (typical) | — |
| Total RAM Bits | 24,576 | 49152 |
| Number of I/O | [DATA_NEEDED: I/O count per datasheet table] | — |
| Tension d'alimentation | 4.75 V to 5.25 V | — |
| Température de fonctionnement | [DATA_NEEDED: commercial 0C to 70C, industrial -40C to 85C per speed grade] | 0C to +70C (Commercial, N suffix) |
| Process Technology | 0.22 µm CMOS | — |
| Speed Grade | -2 (mid-range, ~250 MHz internal) | — |
| Boîtier / Format | 240-BFQFP / 240-PQFP (32x32 mm) | 240-BQFP / 240-PQFP (32x32 mm) |
| Supplier Device Package | 240-PQFP (32x32) | 240-PQFP (32x32) |
| Type de montage | Surface Mount | Surface Mount |
| Configuration Interface | Serial / JTAG (IEEE 1149.1) | — |
| Statut RoHS | [DATA_NEEDED: legacy part, may be non-RoHS] | Lead free / RoHS Compliant |
| Niveau MSL | [DATA_NEEDED: per package qualification] | — |
| Number of LABs / CLBs | — | 624 |
| Number of Gates (Typical) | — | 100000 |
| Number of I/O Pins (User I/O) | — | 189 |
| Voltage - Supply (VCCINT) | — | 2.375 V to 2.625 V (typ. 2.5 V) |
| I/O Voltage | — | 3.3 V multi-voltage I/O |
| Logic Family | — | CMOS, SRAM-based |
| Propagation Delay | — | 0.6 ns (typical, per datasheet support listing) |
| Configuration Method | — | Passive Serial / ByteBlaster; volatile SRAM (external EPC1/EPC2 PROM required) |
| Statut du cycle de vie | — | Obsolete (discontinued by Altera/Intel) |