EPF10K100EFC256-2 vs EPF10K100BFC256-1 Comparaison
Comparaison détaillée côte à côte de EPF10K100EFC256-2 par Intel et EPF10K100BFC256-1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPF10K100EFC256-2 - FLEX 10KE FPGA, 100K Gates, 256-BGA | Intel / Altera
EPF10K100EFC256-2 NrndAltera
EPF10K100BFC256-1 - FLEX-10K 100K-Gate FPGA | Intel/Altera | 256-BGA
EPF10K100BFC256-1 ObsoleteComparaison des spécifications
| Paramètre | EPF10K100EFC256-2 | EPF10K100BFC256-1 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $165,00 | $105,00 |
| Series | FLEX 10KE | FLEX-10K® |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Cells | 4,992 (49,152 user logic elements) | — |
| Number of LABs | 624 | — |
| User I/Os | 191 | — |
| Total RAM Bits | [DATA_NEEDED: total EAB RAM bits] | 6144 |
| Number of Gates | 100,000 equivalent | 100,000 typical system gates |
| Core Supply Voltage (VCCINT) | 2.375 V to 2.625 V | — |
| Logic Family | CMOS (SRAM-based) | — |
| Propagation Delay (per LUT) | ~0.6 ns (speed grade -2) | — |
| Boîtier | 256-FBGA (FineLine BGA, 17 x 17 mm) | 256-FBGA (17 mm x 17 mm) |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Température de fonctionnement | 0 °C to +70 °C (Commercial) | 0°C to +70°C (commercial) |
| Configuration Method | PS, JTAG, in-system programmable | — |
| Process Technology | 0.22 µm CMOS SRAM | 0.42 µm SRAM-based CMOS |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Embedded Array Blocks | Yes (EAB for RAM/ROM/DSP) | — |
| Family | — | FLEX-10K (100K gates) |
| Number of Logic Elements | — | 576 |
| Number of I/O | — | 244 (approx.) |
| Tension d'alimentation | — | 4.75 V to 5.25 V |
| Speed Grade | — | -1 (fastest) |
| Supplier Device Package | — | 256-FBGA |
| Form of Terminal | — | Ball |
| Number of Terminals | — | 256 |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan |
| Configuration Mode | — | In-system programmable (ByteBlaster/BitBlaster) |