EPF10K100EFC484-1 vs EPF10K100EFI484-2 Comparaison
Comparaison détaillée côte à côte de EPF10K100EFC484-1 par Intel et EPF10K100EFI484-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPF10K100EFI484-2 - FLEX 10KE FPGA 100K Gates 484-FBGA | Intel / Altera
EPF10K100EFI484-2 NrndComparaison des spécifications
| Paramètre | EPF10K100EFC484-1 | EPF10K100EFI484-2 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $142,00 | $92,00 |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements / Cells | 4,992 | 4,992 |
| Number of LABs/CLBs | 624 | — |
| Total RAM Bits | 49,152 | — |
| Embedded Memory (Kbits) | 48 (12 EABs) | — |
| Number of Block RAM (EABs) | 12 | — |
| User I/Os | 338 | 338 |
| Total Gates | 257,000 typical system gates | — |
| Operating Supply Voltage (Core) | 2.5 V | — |
| Operating Supply Voltage Range | 2.375 V to 2.625 V | — |
| Process Technology | 0.42 µm CMOS | 0.25 µm CMOS SRAM |
| Propagation Delay | 0.6 ns | 0.6 ns |
| Température de fonctionnement | 0 °C to 70 °C (commercial) | 0 °C to +70 °C |
| Boîtier | 484-FBGA (FineLine BGA, 23×23 mm) | 484-FBGA (FineLine BGA) |
| Type de montage | Surface Mount (SMT) | Surface Mount |
| Program Memory Type | SRAM (volatile) | — |
| Configuration Interface | JTAG (IEEE 1149.1), serial/parallel EPROM | — |
| PCI Support | 3.3 V PCI compliant | — |
| Statut RoHS | Non-compliant (per Arrow listing) | Compliant |
| Statut du cycle de vie | Obsolete (EOL) | — |
| Series | — | FLEX 10KE |
| Manufacturer | — | Intel (formerly Altera) |
| Total System Gates | — | 100,000 |
| Logic Array Blocks (LABs) | — | 624 |
| Embedded Memory (bits) | — | 49,152 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O banks] |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 3.3 V |
| Maximum Frequency | — | 250 MHz |
| Programming Method | — | SRAM (in-system reconfigurable) |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |