EPF10K100EFC484-2 vs EPF10K100EFI484-2 Comparaison
Comparaison détaillée côte à côte de EPF10K100EFC484-2 par Altera et EPF10K100EFI484-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPF10K100EFI484-2 - FLEX 10KE FPGA 100K Gates 484-FBGA | Intel / Altera
EPF10K100EFI484-2 NrndComparaison des spécifications
| Paramètre | EPF10K100EFC484-2 | EPF10K100EFI484-2 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $185,40 | $92,00 |
| Series | FLEX-10KE | FLEX 10KE |
| Manufacturer | Altera (Intel) | Intel (formerly Altera) |
| Family | FLEX-10KE | FLEX 10KE |
| Logic Elements / Cells | 49,992 | 4,992 |
| Logic Array Blocks (LABs) | 624 | 624 |
| Total RAM Bits | [DATA_NEEDED: total embedded memory bits] | — |
| Number of I/O | 338 | — |
| Supply Voltage (Core) | 2.375 V to 2.625 V | — |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0C to +70C (commercial) | 0 °C to +70 °C |
| Boîtier / Format | 484-BBGA | — |
| Supplier Device Package | 484-FBGA (23x23 mm) | — |
| Speed Grade | -2 | — |
| Process Technology | 0.22 um SRAM CMOS | 0.25 µm CMOS SRAM |
| Configuration Method | SRAM - serial JTAG or EPC configuration device | — |
| Programmable I/O Standards | LVTTL, LVCMOS, PCI, SSTL | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Compliant |
| Total System Gates | — | 100,000 |
| Embedded Memory (bits) | — | 49,152 |
| User I/Os | — | 338 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O banks] |
| Boîtier | — | 484-FBGA (FineLine BGA) |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 3.3 V |
| Propagation Delay | — | 0.6 ns |
| Maximum Frequency | — | 250 MHz |
| Programming Method | — | SRAM (in-system reconfigurable) |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |