EPF10K100EQI208-2 vs EPF10K100BQC208-3 Comparaison
Comparaison détaillée côte à côte de EPF10K100EQI208-2 par Intel et EPF10K100BQC208-3 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF10K100BQC208-3 - 100K Gate FLEX-10KE FPGA, 208-PQFP | Altera
EPF10K100BQC208-3 ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPF10K100EQI208-2 | EPF10K100BQC208-3 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $24,50 |
| Family | FLEX 10KE | — |
| Logic Elements / Cells | 4,992 | 4,992 cells |
| Typical Gates | 100,000 | 100,000 gates |
| Embedded Memory (bits) | 49,152 | — |
| Logic Array Blocks (LABs) | 624 | — |
| User I/Os | 147 | — |
| Boîtier | 208-pin PQFP (BFQFP) | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS, SRAM-based |
| Core Supply Voltage | 2.5 V | — |
| Propagation Delay | 0.6 ns | — |
| Maximum Internal Frequency | 250 MHz | — |
| Température de fonctionnement | 0°C to 70°C (commercial) | 0C to +70C (commercial) |
| Speed Grade | I (industrial temp), -2 timing | — |
| I/O Standards | 2.5 V / 3.3 V / 5 V tolerant | — |
| Configuration Interface | JTAG (IEEE 1149.1) / serial / parallel | — |
| Programming Method | In-system programmable (ISP) / SRAM-based | — |
| PCI Compliant | Yes | — |
| Statut RoHS | [DATA_NEEDED: rohs status] | Non-compliant (legacy PQFP) |
| Series | — | FLEX-10KE |
| Total RAM Bits | — | 6,144 bits |
| Number of I/O | — | 147 (max for 208-PQFP) |
| Tension d'alimentation | — | 4.75 V to 5.25 V |
| Pin-to-Pin Delay | — | 14.5 ns (speed grade -3) |
| Internal Performance | — | Up to 200 MHz |
| Type de montage | — | Surface Mount |
| Boîtier / Format | — | 208-BFQFP (PQFP) |
| Supplier Device Package | — | 208-PQFP (28x28 mm) |
| Configuration Method | — | SRAM, serial or parallel, JTAG (IEEE 1149.1) |