EPF10K130EBC356-3 vs EPF10K130EBC356-1N Comparaison
Comparaison détaillée côte à côte de EPF10K130EBC356-3 par Altera et EPF10K130EBC356-1N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPF10K130EBC356-3 | EPF10K130EBC356-1N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $35,20 | $18,20 |
| Family | FLEX-10KE | FLEX 10KE |
| Series | FLEX-10KE | — |
| Typical Gates | 130,000 | 130,000 |
| Logic Elements | 8,192 | — |
| Logic Array Blocks (LABs) | 832 | — |
| Embedded Array Blocks (EABs) | 12 | [DATA_NEEDED: EAB count for EPF10K130E] |
| Total RAM Bits | 24,576 bits (12 EABs × 2 Kbit) | 65,536 |
| Maximum User I/Os | 274 | — |
| Core Supply Voltage | 2.375 V to 2.625 V | 2.5 V |
| I/O Supply Voltage | 2.5 V / 3.3 V / 5.0 V (multiVolt I/O) | 3.3 V |
| Pin-to-Pin Propagation Delay (-3 grade) | 0.6 ns | — |
| Température de fonctionnement | 0 °C to +70 °C (Commercial) | 0 °C to 70 °C (Commercial) |
| Boîtier | 356-LBGA (35x35 mm) | 356-LBGA |
| Type de montage | Surface Mount | Surface Mount |
| Logic Family | CMOS | CMOS |
| Process Technology | 0.22 µm SRAM-based CMOS | 0.22 µm |
| Configuration Method | SRAM-based, JTAG (IEEE 1149.1) in-system programmable | — |
| Speed Grade | -3 (fastest) | -1 |
| Statut RoHS | Non-compliant (SnPb ball finish on legacy BGA) | [DATA_NEEDED: RoHS compliance for EPF10K130EBC356-1N] |
| Lead-Free | No | — |
| Lifecycle | Obsolete — last-time-buy / Rochester Electronics stock only | — |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates for EPF10K130E] |
| Logic Elements (LEs) | — | 6,656 |
| User I/O Pins | — | 274 |
| Package Code | — | LBGA |
| Propagation Delay | — | 0.6 ns |
| Maximum Internal Frequency | — | 333.33 MHz |
| JTAG Boundary-Scan | — | IEEE Std. 1149.1-1990 compliant |
| PCI Compliance | — | PCI Local Bus Specification Rev. 2.2 (33/66 MHz, 3.3 V and 5.0 V) |