EPF10K130EQI240-2N vs EPF10K130EQC240-3N Comparaison
Comparaison détaillée côte à côte de EPF10K130EQI240-2N par Altera et EPF10K130EQC240-3N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF10K130EQI240-2N - 130K Gates FLEX-10KE FPGA, 240-PQFP | Intel / Altera
EPF10K130EQI240-2N NrndIntel
EPF10K130EQC240-3N - 130K Gate FLEX-10KE FPGA, 240-PQFP | Intel
EPF10K130EQC240-3N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPF10K130EQI240-2N | EPF10K130EQC240-3N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $60,00 | $19,80 |
| Series | FLEX-10KE | FLEX 10KE |
| Family | FLEX 10KE Embedded Programmable Logic | FLEX-10KE® |
| Logic Elements / Cells | 6,656 | — |
| Total RAM Bits | 65,536 bits (EAB) | 65,536 bits |
| Number of LABs | 832 | — |
| Number of User I/Os | 186 | — |
| Number of Gates (typical) | 130,000 | — |
| Boîtier | 240-BFQFP (PQFP) | 240-BQFP (PQFP), 32 x 32 mm |
| Type de montage | Surface Mount (PQFP) | Surface Mount |
| Température de fonctionnement | -40 °C to +85 °C (Industrial, I grade) | 0 °C to +70 °C (Commercial) |
| Tension d'alimentation | 3.3 V core | — |
| I/O Voltage Tolerance | MultiVolt 3.3 V / 5 V tolerant | — |
| Propagation Delay (typical) | 0.6 ns | — |
| Logic Family | CMOS, SRAM-based | — |
| Configuration Method | Passive Serial (PS), JTAG | SRAM (volatile, requires external PROM) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Compliant |
| Lead Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements | — | 6,656 |
| Logic Array Blocks (LABs) | — | 832 |
| Number of I/O Pins | — | 186 |
| Number of Gates | — | 342,000 (typical 49,152) |
| Maximum Frequency | — | 200 MHz |
| Core Voltage | — | 2.5 V (2.375 V to 2.625 V) |
| Technology | — | 0.22 µm CMOS, SRAM-based |
| Lead Finish | — | Gull-wing, lead-free (per Altera datasheet) |
| PLLs | — | 4 |
| Embedded Multipliers | — | Yes (EABs configurable as multipliers) |
| Supply Voltage I/O | — | 3.3 V LVTTL/LVCMOS, 5 V tolerant inputs |