EPF10K200SBC356-2X vs EPF10K200SBC356-2 Comparaison
Comparaison détaillée côte à côte de EPF10K200SBC356-2X par Intel et EPF10K200SBC356-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPF10K200SBC356-2X - FLEX 10K 200K Gates FPGA, 274 I/O, 356-BGA | Intel/Altera
EPF10K200SBC356-2X NrndComparaison des spécifications
| Paramètre | EPF10K200SBC356-2X | EPF10K200SBC356-2 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $295,00 | $178,00 |
| Series | FLEX-10KS | FLEX 10KS |
| Family | FLEX 10K | FLEX 10KS (Embedded Programmable Logic) |
| Logic Elements / Cells | 9984 | 9984 |
| Approximate Gate Count | 200,000 | — |
| Logic Array Blocks (LABs) | 1248 | 1248 |
| User I/O Count | 274 | — |
| Boîtier | 356-LBGA (35x35 mm, 1.27 mm pitch) | 356-LBGA (FineLine BGA, 35 x 35 mm, 1.27 mm pitch) |
| Tension d'alimentation | 2.375 V to 2.625 V (core) | — |
| Process Technology | CMOS 0.22 µm | 0.22 um CMOS |
| Propagation Delay (typ.) | 0.4 ns | — |
| Speed Grade | -2 | -2 |
| Température de fonctionnement | 0 °C to +70 °C (commercial) | 0C to +70C (Commercial) |
| Type de montage | Surface Mount | Surface Mount |
| Lead Free Status / RoHS | RoHS non-compliant (per third-party listing) | — |
| Configuration Method | SRAM-based, requires external configuration device (EPC2/EPC8) | — |
| In-System Programmability | Yes (via JTAG or serial interface) | — |
| Embedded Memory Bits (EAB) | — | 98304 |
| System Gates | — | 200,000 |
| User I/Os | — | 274 |
| Number of I/O Banks | — | 8 |
| Supply Voltage (Core) | — | 2.5 V (2.375 V - 2.625 V) |
| I/O Voltage (PCI-compatible) | — | 3.3 V / 5.0 V tolerant |
| Propagation Delay | — | 0.4 ns (per datasheet) |
| Configuration | — | SRAM-based (volatile, requires configuration device) |
| Boundary Scan | — | Yes (JTAG IEEE 1149.1) |
| PLL | — | Yes (on-chip) |
| Statut RoHS | — | Non-compliant (legacy part) |