EPF10K200SRC240-1 vs EPF10K100EQC240-2N Comparaison
Comparaison détaillée côte à côte de EPF10K200SRC240-1 par Intel et EPF10K100EQC240-2N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF10K100EQC240-2N - 100K Gates FLEX-10KE FPGA, 240-PQFP | Altera
EPF10K100EQC240-2N ObsoleteComparaison des spécifications
| Paramètre | EPF10K200SRC240-1 | EPF10K100EQC240-2N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $112,00 | $18,40 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | FLEX-10KS | FLEX 10KE |
| Family | FLEX 10K Embedded Programmable Logic | — |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Number of Logic Elements | 9984 | — |
| Number of LABs (Logic Array Blocks) | 1248 | — |
| Number of EABs (Embedded Array Blocks) | 24 | — |
| Total EAB RAM Bits | 40960 | — |
| Total SRAM Bits | 98304 | — |
| Typical System Gates | 200000 | — |
| Maximum System Gates | 513000 | — |
| Number of I/O Pins | 182 | — |
| Supply Voltage - Core | 5.0 V | — |
| Supply Voltage - I/O | 3.3 V / 5.0 V (multiVolt) | — |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -40C to +85C (industrial) | 0C to +70C (Commercial, N suffix) |
| Boîtier / Format | 240-BFQFP Exposed Pad (RQFP-240) | 240-BQFP / 240-PQFP (32x32 mm) |
| Supplier Device Package | 240-RQFP (32x32 mm) | 240-PQFP (32x32) |
| Speed Grade | -1 (fastest) | — |
| Programmability | SRAM-based, in-system via JTAG | — |
| JTAG (IEEE 1149.1) | Yes | — |
| Statut RoHS | [DATA_NEEDED: rohs status] | Lead free / RoHS Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements / Cells | — | 4992 |
| Total RAM Bits | — | 49152 |
| Number of LABs / CLBs | — | 624 |
| Number of Gates (Typical) | — | 100000 |
| Number of I/O Pins (User I/O) | — | 189 |
| Voltage - Supply (VCCINT) | — | 2.375 V to 2.625 V (typ. 2.5 V) |
| I/O Voltage | — | 3.3 V multi-voltage I/O |
| Logic Family | — | CMOS, SRAM-based |
| Propagation Delay | — | 0.6 ns (typical, per datasheet support listing) |
| Configuration Method | — | Passive Serial / ByteBlaster; volatile SRAM (external EPC1/EPC2 PROM required) |
| Statut du cycle de vie | — | Obsolete (discontinued by Altera/Intel) |