EPF10K20RI240-4 vs EPF10K20RC240-3N Comparaison
Comparaison détaillée côte à côte de EPF10K20RI240-4 par Altera et EPF10K20RC240-3N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPF10K20RI240-4 | EPF10K20RC240-3N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,75 | $23,10 |
| Family | FLEX 10K | Embedded Programmable Logic Device (EPLD) |
| Series | EPF10K20 | FLEX 10K |
| Logic Elements / Cells | 1,152 | — |
| Total RAM Bits | 12,288 | — |
| Logic Array Blocks (LABs) | 144 | 144 |
| Number of Gates | 20,000 (typical) | — |
| User I/O Count | 189 | — |
| Number of Embedded Array Blocks (EABs) | [DATA_NEEDED: number of EABs] | — |
| Maximum Operating Frequency | 125 MHz | — |
| Core Supply Voltage | 5 V | — |
| I/O Supply Voltage | 5 V | — |
| Process Technology | 0.42 µm CMOS (SRAM) | — |
| Package Type | 240-BFQFP / 240-RQFP with exposed pad | 240-RQFP (HFQFP, exposed pad) |
| Operating Temperature Grade | Industrial | — |
| Configuration Memory | SRAM (volatile, external config device required) | SRAM (volatile, re-programmable) |
| Type de montage | Surface Mount | Surface Mount (gull wing) |
| Statut RoHS | Non-compliant (legacy 5 V process) | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | Contains lead (legacy) | [DATA_NEEDED: lead-free status] |
| Logic Cells / Elements | — | 1152 |
| Total Gates | — | 20,000 (typical usable) |
| Logic Capacity (typical) | — | 12,888 |
| User I/O Pins | — | 189 |
| Embedded Array Blocks (EABs) | — | 6 (per family architecture) |
| Nombre de broches | — | 240 |
| Package Code | — | HFQFP / RQFP |
| Tension d'alimentation | — | 5 V |
| Technology / Process | — | 0.42 µm CMOS |
| Maximum Internal Frequency | — | 125 MHz |
| Propagation Delay | — | 0.4 ns (typical) |
| Speed Grade | — | -3 |
| Température de fonctionnement | — | 0 °C to +70 °C (commercial) |
| Programming Interface | — | JTAG (IEEE 1149.1), ByteBlaster / MasterBlaster / ByteBlasterMV |