EPF10K30RC240-3 vs EPF10K30RC240-4 Comparaison
Comparaison détaillée côte à côte de EPF10K30RC240-3 par Altera et EPF10K30RC240-4 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPF10K30RC240-3 | EPF10K30RC240-4 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $95,00 | $61,75 |
| Family | FLEX 10K | FLEX 10K |
| Typical Gates | 30,000 | — |
| Logic Elements (LEs) | 1,728 | — |
| Logic Array Blocks (LABs) | 216 | — |
| Embedded Array Blocks (EABs) | 6 | — |
| Total RAM Bits | 12,288 | 12,288 bits |
| User I/O Pins | 189 | — |
| Process Technology | 0.42 um CMOS, SRAM-based | 0.42 µm CMOS |
| Core Supply Voltage | 5.0 V (VCCINT) | — |
| I/O Supply Voltage | 3.3 V or 5.0 V (multiVolt I/O) | — |
| Maximum Internal Frequency | 125 MHz (speed grade -3) | — |
| Propagation Delay | 0.6 ns typical | — |
| Boîtier | 240-RQFP / 240-BFQFP Exposed Pad | 240-RQFP (240-BFQFP Exposed Pad) |
| Température de fonctionnement | 0C to +70C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Configuration Method | Serial / parallel PROM, JTAG | — |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Contains lead (non-RoHS) | unknown |
| Logic Elements / Cells | — | 1,728 cells |
| Typical Gate Count | — | 30,000 gates |
| Number of Logic Array Blocks (LABs) | — | 216 |
| User I/Os | — | 189 |
| Tension d'alimentation | — | 5 V |
| Operating Frequency (max) | — | 125 MHz |
| Speed Grade | — | -4 |
| Configuration Memory | — | SRAM (volatile, in-system reconfigurable) |
| Lead-Free | — | unknown |