EPF10K50SQC240-2N vs EPF10K50EQC240-1N Comparaison
Comparaison détaillée côte à côte de EPF10K50SQC240-2N par Intel et EPF10K50EQC240-1N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF10K50EQC240-1N - FLEX 10KE FPGA 50K Gates 2880 Cells 240-PQFP | Altera
EPF10K50EQC240-1N ObsoleteComparaison des spécifications
| Paramètre | EPF10K50SQC240-2N | EPF10K50EQC240-1N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $36,80 | $132,10 |
| Family | FLEX 10KE | FLEX 10KE |
| Series | FLEX-10KS | — |
| System Gates | 50,000 | — |
| Typical Gates | 40,960 | — |
| Logic Cells | 2,880 | — |
| Logic Array Blocks (LABs) | 360 | — |
| Embedded Array Blocks (EABs) | 40 | — |
| Maximum User I/O | 189 | — |
| Boîtier | 240-BFQFP (PQFP-240) | 240-pin PQFP / BFQFP |
| Nombre de broches | 240 | — |
| Pitch | 0.5 mm | — |
| Core Voltage (VCCINT) | 2.5 V | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Internal Frequency (max) | 200 MHz | — |
| Propagation Delay | 0.6 ns | 0.5 ns |
| Température de fonctionnement | 0 °C to 70 °C (commercial) | 0 °C to +85 °C (Commercial) |
| Programming Interface | IEEE 1149.1 JTAG / ByteBlaster / USB-Blaster | — |
| Statut RoHS | Compliant (lead-free -N suffix) | [DATA_NEEDED: RoHS status] |
| Type de montage | Surface Mount | Surface Mount (PQFP) |
| Logic Elements / Cells | — | 2880 |
| Total RAM Bits | — | 40960 |
| Number of Logic Gates | — | 50K |
| Number of LABs/CLBs | — | 360 LABs |
| Number of I/O | — | 189 |
| Supply Voltage (Core) | — | 2.5 V |
| Supply Voltage (I/O MultiVolt) | — | 2.5 V / 3.3 V / 5 V |
| Maximum Internal Frequency | — | 250 MHz |
| Configuration Mode | — | Passive Serial (PS), JTAG |
| JTAG Boundary Scan | — | IEEE 1149.1 compliant |
| Lead Free | — | [DATA_NEEDED: lead-free status] |