EPF10K50SQC240-2N vs EPF10K50SQC240-3N Comparaison
Comparaison détaillée côte à côte de EPF10K50SQC240-2N par Intel et EPF10K50SQC240-3N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF10K50SQC240-3N - FLEX 10KE 50K Gates FPGA, 240-PQFP | Altera / Intel
EPF10K50SQC240-3N ObsoleteComparaison des spécifications
| Paramètre | EPF10K50SQC240-2N | EPF10K50SQC240-3N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $36,80 | $60,00 |
| Family | FLEX 10KE | FLEX 10KE |
| Series | FLEX-10KS | — |
| System Gates | 50,000 | 40,960 |
| Typical Gates | 40,960 | 50,000 |
| Logic Cells | 2,880 | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| Embedded Array Blocks (EABs) | 40 | 12 |
| Maximum User I/O | 189 | — |
| Boîtier | 240-BFQFP (PQFP-240) | 240-pin PQFP (Power Quad Flat Pack), 34.60 x 34.6 mm, 0.5 mm pitch |
| Nombre de broches | 240 | — |
| Pitch | 0.5 mm | — |
| Core Voltage (VCCINT) | 2.5 V | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | MultiVolt: 2.5 V / 3.3 V / 5.0 V tolerant |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Internal Frequency (max) | 200 MHz | — |
| Propagation Delay | 0.6 ns | — |
| Température de fonctionnement | 0 °C to 70 °C (commercial) | 0 °C to 70 °C (Commercial) |
| Programming Interface | IEEE 1149.1 JTAG / ByteBlaster / USB-Blaster | — |
| Statut RoHS | Compliant (lead-free -N suffix) | Compliant (Pb-free N suffix) |
| Type de montage | Surface Mount | Surface Mount |
| Logic Family | — | CMOS |
| Logic Cells / Elements | — | 2,880 |
| On-chip EAB Memory | — | 24 Kbits |
| User I/Os | — | 189 (per DigiKey listing); 274 user I/Os (per Digchip listing) |
| Number of I/Os (per distributor) | — | 189 (DigiKey / Mouser) |
| Propagation Delay (tpd) | — | 0.6 ns |
| Internal Frequency (Fmax) | — | 166.67 MHz |
| Core Supply Voltage (VCCINT) | — | 2.5 V |
| Speed Grade | — | -3 (faster Fmax) |
| Lead-Free Finish (N suffix) | — | Yes |
| JTAG Boundary Scan | — | IEEE Std. 1149.1 compliant |
| Programming Technology | — | SRAM-based, in-system reconfigurable via JTAG |
| Design Tool | — | Altera Quartus II (FLEX 10KE support) |