EPF10K50VQC240-1N vs EPF10K50EQC240-1N Comparaison
Comparaison détaillée côte à côte de EPF10K50VQC240-1N par Altera et EPF10K50EQC240-1N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF10K50VQC240-1N - 50K-Gate FLEX-10K FPGA | Intel / Altera | 240-PQFP
EPF10K50VQC240-1N ObsoleteAltera
EPF10K50EQC240-1N - FLEX 10KE FPGA 50K Gates 2880 Cells 240-PQFP | Altera
EPF10K50EQC240-1N ObsoleteComparaison des spécifications
| Paramètre | EPF10K50VQC240-1N | EPF10K50EQC240-1N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $11,50 | $132,10 |
| Manufacturer | Intel / Altera | — |
| Series | FLEX-10K | — |
| Typical Gates | 50,000 | — |
| Logic Elements / Cells | 2,880 | 2880 |
| Total RAM Bits | 20,480 | 40960 |
| Logic Array Blocks (LABs) | 360 | — |
| User I/Os | 189 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Tension d'alimentation | 3.0 V to 3.6 V | — |
| Internal Frequency (max) | 250 MHz | — |
| Propagation Delay | 0.6 ns | 0.5 ns |
| Boîtier | 240-BQFP (PQFP, 32x32 mm) | 240-pin PQFP / BFQFP |
| Type de montage | Surface Mount (gull-wing) | Surface Mount (PQFP) |
| Température de fonctionnement | 0 C to 70 C (Commercial) | 0 °C to +85 °C (Commercial) |
| Speed Grade | -1 | — |
| Lead-Free / Pb-Free | Yes (N suffix) | — |
| Configuration Method | Serial / JTAG / EPC | — |
| Statut RoHS | Compliant (per N suffix Pb-free) | [DATA_NEEDED: RoHS status] |
| Family | — | FLEX 10KE |
| Number of Logic Gates | — | 50K |
| Number of LABs/CLBs | — | 360 LABs |
| Number of I/O | — | 189 |
| Supply Voltage (Core) | — | 2.5 V |
| Supply Voltage (I/O MultiVolt) | — | 2.5 V / 3.3 V / 5 V |
| Process Technology | — | 0.22 µm CMOS |
| Maximum Internal Frequency | — | 250 MHz |
| Configuration Mode | — | Passive Serial (PS), JTAG |
| JTAG Boundary Scan | — | IEEE 1149.1 compliant |
| Lead Free | — | [DATA_NEEDED: lead-free status] |