EPF10K50VRC240-1 vs EPF10K50VRC240-2 Comparaison
Comparaison détaillée côte à côte de EPF10K50VRC240-1 par Intel et EPF10K50VRC240-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPF10K50VRC240-1 | EPF10K50VRC240-2 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $130,32 | $18,95 |
| Family | FLEX 10K | Flex 10K |
| Logic Elements | 2,880 | — |
| Typical Gates | 50,000 | 50,000 |
| Embedded Memory | 20,480 bits (189 Kb) | — |
| User I/O | 274 (max) | — |
| Number of I/O Pins | 189 | — |
| Boîtier | 240-RQFP Exposed Pad | 240-pin RQFP / HFQFP (exposed pad), gull-wing |
| Pins | 240 | — |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | MultiVolt (2.5 V / 3.3 V / 5 V tolerant) | — |
| Internal Frequency (max) | 66.67 MHz | — |
| Propagation Delay | 0.6 ns | 0.6 ns |
| Process Technology | 0.42 µm CMOS | 0.42 µm CMOS |
| Logic Family | CMOS | — |
| Température de fonctionnement | 0 °C to +70 °C (Commercial) | 0 °C to +70 °C (commercial) |
| JTAG Support | Yes (IEEE Std 1149.1-1990) | — |
| Configuration Interface | JTAG / BitBlaster / ByteBlasterMV / Jam STAPL | — |
| Programming Language | Altera MAX+PLUS II / Quartus | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS compliance] |
| Logic Cells | — | 2,880 |
| Logic Elements (LEs) | — | 20,480 |
| Logic Array Blocks (LABs) | — | 360 |
| User I/Os | — | 189 |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count and RAM bits] |
| Maximum Internal Frequency | — | 125 MHz |
| Core Supply Voltage | — | 3.3 V |
| Speed Grade | — | -2 (mid) |
| Configuration Memory | — | SRAM (volatile, external PROM required) |