EPF6010ATC100-2 vs EPF6010ANTC100-2 Comparaison
Comparaison détaillée côte à côte de EPF6010ATC100-2 par Altera et EPF6010ANTC100-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF6010ATC100-2 - FLEX 6000 FPGA, 880 Gates, 71 I/O | Intel (Altera)
EPF6010ATC100-2 ObsoleteIntel
EPF6010ANTC100-2 - FLEX 6000 FPGA, 880 LEs, 71 I/O, 100-TQFP | Intel
EPF6010ANTC100-2 ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPF6010ATC100-2 | EPF6010ANTC100-2 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $14,20 | $17,50 |
| Series | FLEX 6000 | — |
| Family | SRAM-based FPGA | FLEX 6000 / FLEX 6000A |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Gates | 880 gates (typical) | — |
| Logic Array Blocks (LABs) | 88 | — |
| User I/O Pins | 71 | — |
| Number of Logic Cells | 880 (per FLEX 6000 family datasheet) | — |
| Boîtier | 100-pin TQFP (14x14 mm) | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| Speed Grade | -2 | -2 |
| Température de fonctionnement | 0C to 70C (commercial) | Commercial (0C to +70C) |
| Core Supply Voltage | 3.0 V to 3.6 V (typical 3.3 V) | — |
| I/O Supply Voltage | 3.3 V (5 V tolerant inputs per FLEX 6000 family) | — |
| Configuration Interface | JTAG (IEEE 1149.1) + serial configuration | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: moisture sensitivity level] | 3 (168 hours) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance] |
| Process Node | [DATA_NEEDED: CMOS process node] | — |
| Total RAM Bits | [DATA_NEEDED: embedded RAM] | — |
| Logic Elements | — | 880 |
| Programmable I/O Pins | — | 71 |
| Configuration Method | — | SRAM (volatile), in-system programmable |
| Programming Interface | — | IEEE 1149.1 (JTAG) / passive serial / EPC configuration device |
| Supply Voltage (VCCINT) | — | 5.0 V (FLEX 6000A); 3.3 V (FLEX 6000) |
| I/O Standards Supported | — | TTL, CMOS, PCI (with clamping diodes) |
| Number of LABs | — | [DATA_NEEDED: LAB count] |
| Embedded Memory | — | [DATA_NEEDED: embedded RAM blocks] |
| Global Clock Networks | — | [DATA_NEEDED: global clock count] |
| Packaging | — | Tray (per Altera packing standard) |