EPF6010ATI100-2 vs EPF6010ANTC100-2 Comparaison
Comparaison détaillée côte à côte de EPF6010ATI100-2 par Altera et EPF6010ANTC100-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF6010ATI100-2 - FLEX 6000 10K Gates FPGA | Altera | 100-TQFP
EPF6010ATI100-2 ⚠ Dernier achatIntel
EPF6010ANTC100-2 - FLEX 6000 FPGA, 880 LEs, 71 I/O, 100-TQFP | Intel
EPF6010ANTC100-2 ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPF6010ATI100-2 | EPF6010ANTC100-2 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $16,20 | $17,50 |
| Family | FLEX 6000 | FLEX 6000 / FLEX 6000A |
| Logic Elements | 880 | 880 |
| Logic Array Blocks (LABs) | 88 | — |
| Usable Gates | 10,000 | — |
| User I/O Pins | 71 | — |
| Maximum Operating Frequency | 166.67 MHz | — |
| Process Technology | 0.42 µm CMOS | — |
| Core Voltage | 3.3 V | — |
| I/O Voltage | 3.3 V (5 V tolerant) | — |
| Boîtier | 100-pin TQFP (14×14 mm, 0.5 mm pitch) | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| Configuration Technology | SRAM (volatile) | — |
| Température de fonctionnement | -40 °C to +85 °C (industrial) | Commercial (0C to +70C) |
| Speed Grade | -2 | -2 |
| Type de montage | Surface Mount | Surface Mount |
| Terminal Form | Gull Wing | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Dedicated Inputs per LAB | 4 | — |
| Programmable I/O Pins | — | 71 |
| Configuration Method | — | SRAM (volatile), in-system programmable |
| Programming Interface | — | IEEE 1149.1 (JTAG) / passive serial / EPC configuration device |
| Supply Voltage (VCCINT) | — | 5.0 V (FLEX 6000A); 3.3 V (FLEX 6000) |
| I/O Standards Supported | — | TTL, CMOS, PCI (with clamping diodes) |
| Number of LABs | — | [DATA_NEEDED: LAB count] |
| Embedded Memory | — | [DATA_NEEDED: embedded RAM blocks] |
| Global Clock Networks | — | [DATA_NEEDED: global clock count] |
| Niveau MSL | — | 3 (168 hours) |
| Packaging | — | Tray (per Altera packing standard) |