EPF8820AQC208-3N vs EPF8820AQC208-2 Comparaison
Comparaison détaillée côte à côte de EPF8820AQC208-3N par Altera et EPF8820AQC208-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF8820AQC208-2 - FLEX 8000 FPGA, 8K Gates, 152 I/O, 5V, PQFP-208 | Altera
EPF8820AQC208-2 ObsoleteComparaison des spécifications
| Paramètre | EPF8820AQC208-3N | EPF8820AQC208-2 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $11,40 | $22,80 |
| Device Family | FLEX 8000 | — |
| Product Type | FPGA (Field-Programmable Gate Array) / Loadable PLD | — |
| Usable Gates | 8,000 (up to 16,000 family maximum) | 8,000 |
| Logic Cells (LEs) | 672 | — |
| User I/Os | 152 | 152 |
| Logic Elements / Registers | 1,500 | — |
| Process Technology | 0.42 µm CMOS SRAM | CMOS, SRAM-based configuration |
| Tension d'alimentation | 5 V | 5 V |
| Température de fonctionnement | 0 °C to 70 °C (Commercial) | 0 C to 70 C (Commercial) |
| Package Type | FQFP-208 (PQFP-208, gull-wing) | 208-BFQFP / 208-Pin PQFP (FQFP) |
| Package Code | FQFP | FQFP, gull-wing terminals |
| Terminal Form | Gull Wing | — |
| Terminal Count | 208 | — |
| Speed Grade | -3 (16-bit loadable counter 95 MHz; 16-to-1 MUX 7.9 ns) | — |
| Configuration Memory | CMOS SRAM (volatile, in-circuit reconfigurable) | — |
| Configuration Devices Supported | EPC1, EPC1213, EPC1064, EPC1441 | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status not specified in provided data] |
| Manufacturer | — | Altera (Intel PSG) |
| Family | — | FLEX 8000 |
| Device Type | — | FPGA - Field Programmable Gate Array |
| Logic Cells / Registers | — | 672 |
| Logic Array Blocks (LABs) | — | 84 (8 LEs per LAB) |
| Maximum Operating Frequency | — | 125 MHz |
| Logic Family | — | CMOS |
| Configuration Method | — | In-Circuit Reconfigurability (ICR) via external device; SRAM-volatile |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Grade | — | Commercial |