EPF8820ARC208-4N vs EPF8636ARC208-4 Comparaison
Comparaison détaillée côte à côte de EPF8820ARC208-4N par Altera et EPF8636ARC208-4 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPF8820ARC208-4N | EPF8636ARC208-4 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $32,00 | $16,50 |
| Family | FLEX 8000 | — |
| Usable Gates | 8,000 | 6,000 |
| Logic Elements (Cells) | 672 | — |
| Maximum Operating Frequency | 125 MHz | — |
| Propagation Delay | 5.5 ns | — |
| Number of User I/O | 152 | — |
| Dedicated Inputs | 4 | — |
| Core Voltage | 5 V (4.75 V to 5.25 V) | — |
| I/O Voltage | 3.3 V or 5 V (configurable) | — |
| Process Technology | 0.42 µm CMOS | 5 V CMOS, 0.42 um |
| Boîtier | 208-RQFP / BFQFP with exposed pad | 208-RQFP (28x28 mm) with exposed pad |
| Configuration Memory | SRAM (volatile) | — |
| Operating Temperature (Commercial) | 0 °C to +70 °C | — |
| Operating Temperature (Industrial) | -40 °C to +85 °C | — |
| In-Circuit Reconfigurability | Yes (via external configuration device or intelligent controller) | — |
| Boundary-Scan (JTAG) | Yes (IEEE 1149.1 compliant) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (legacy 5 V family) |
| Type de montage | Surface Mount | Surface Mount |
| Product Family | — | FLEX 8000 |
| Device Series | — | EPF8636A |
| Logic Elements | — | 136 |
| Flip-Flops (Registers) | — | 504 |
| Maximum User I/O | — | 218 |
| Embedded RAM Blocks | — | 8 x 256 x 8 bits |
| Logic Block Type | — | 4-input LUT with fast-carry chain |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| I/O Voltage Tolerance | — | 3.3 V or 5 V |
| Speed Grade | — | -4 |
| Température de fonctionnement | — | -40 C to +105 C |
| Configuration Method | — | Serial configuration EEPROM (in-system) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |