EPF8820ATC144-8 vs EPF8820ATC144-15 Comparaison
Comparaison détaillée côte à côte de EPF8820ATC144-8 par Altera et EPF8820ATC144-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPF8820ATC144-8 | EPF8820ATC144-15 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $17,90 | $19,50 |
| Family | FLEX 8000 | FLEX 8000 |
| Number of Logic Elements | 672 | — |
| Number of LABs | 84 | — |
| Usable Gates | 8,000 | 8000 |
| Number of I/O Pins | 112 | — |
| Total User I/O | 112 | — |
| Boîtier | 144-LQFP (TQFP) | 144-pin TQFP (also marketed as LQFP) |
| Terminal Pitch | 0.500 mm | — |
| Tension d'alimentation | 5.0 V (MultiVolt I/O 3.3V or 5.0V supported) | — |
| Process Technology | 0.42 um CMOS, 4-layer metal | 5 V CMOS SRAM |
| Configuration Memory | CMOS SRAM | — |
| Logic Element Type | 4-input LUT + programmable flip-flop | — |
| Interconnect | Continuous FastTrack | — |
| Speed Grade | -8 | -15 (approx. 15 ns tpd) |
| Supported Configuration Devices | EPC1, EPC1213, EPC1064, EPC1441, parallel EPROM, system controller | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Lead-free / RoHS Compliant | — |
| Logic Elements (Cells) | — | 672 |
| Maximum User I/O | — | 112 |
| Supply Voltage (Core) | — | 5 V |
| I/O Voltage Support | — | 3.3 V or 5.0 V (MultiVolt I/O) |
| Configuration Method | — | Serial or parallel EPROM, JTAG |
| Configuration Devices | — | EPC1, EPC1064, EPC1213, EPC1441 |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |
| In-Circuit Reconfigurability | — | Yes (ICR via external controller) |
| Température de fonctionnement | — | 0 C to 70 C (commercial) |
| Lead-Free / RoHS | — | Lead-free / RoHS compliant (per distributor data) |
| Architecture | — | Logic Array Blocks with FastTrack interconnect |