EPM3128ATC144-5 vs EPM3128ATC144-10 Comparaison
Comparaison détaillée côte à côte de EPM3128ATC144-5 par Altera et EPM3128ATC144-10 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM3128ATC144-5 | EPM3128ATC144-10 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $4,85 | $6,20 |
| Family | MAX 3000A | MAX 3000A |
| Logic Family | CMOS | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | 128 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Number of User I/Os | 96 | — |
| Device System Gates | 2500 | — |
| Product Terms per Macrocell | 32 | — |
| Propagation Delay (tPD) | 7.5 ns | 10 ns (speed grade -10) |
| Maximum Internal Frequency | 192.3 MHz | — |
| Number of Global Clocks | 2 | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| Supply Voltage (Core) | 3.3 V | — |
| Multi-Volt I/O Voltage | 2.5 V / 3.3 V / 5.0 V tolerant | — |
| In-System Programmability | Yes (IEEE Std. 1532 compliant) | IEEE Std. 1532 compliant |
| JTAG / IEEE 1149.1 | Yes (boundary-scan + ISP) | — |
| Température de fonctionnement | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Boîtier | TQFP-144 (Plastic, 1.0 mm pitch, 22x22 mm) | 144-pin TQFP (TQ144) |
| Process Technology | 0.30 um CMOS EEPROM, 4 metal layers | — |
| Statut RoHS | Not Compliant (per Arrow distributor listing) | Compliant |
| ECCN | EAR99 | — |
| HTS Code | 8542.31.00.55 | — |
| Macro Cells | — | 128 |
| User I/Os | — | 96 |
| Usable Gates | — | 2,500 (typical) |
| Logic Elements / LABs | — | 4 Logic Array Blocks |
| Counter Frequency (fCNT) | — | Up to 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| MultiVolt I/O Interface | — | 1.5V / 1.8V / 2.5V / 3.3V |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) |
| Configuration Memory | — | EEPROM (non-volatile, instant-on) |
| Type de montage | — | Surface Mount |
| Lead-Free | — | Yes |