EPM3256ATC144-7 vs EPM3256ATC144-10N Comparaison
Comparaison détaillée côte à côte de EPM3256ATC144-7 par Altera et EPM3256ATC144-10N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM3256ATC144-10N - 256-Macro CPLD, 10ns, 144-TQFP | Altera
EPM3256ATC144-10N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPM3256ATC144-7 | EPM3256ATC144-10N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $17,06 | $14,50 |
| Family | MAX 3000A | — |
| Macrocells | 256 | — |
| User I/Os | 116 | — |
| Logic Elements / Gates | 600 to 10,000 usable gates | — |
| Propagation Delay (tPD) | 7.5 ns | 10 ns |
| Counter Frequency (fCNT) | 227.3 MHz | — |
| Speed Grade | -7 | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 2.5 V / 3.3 V / 5.0 V | — |
| In-System Programming | IEEE Std. 1532 compliant, 3.3 V ISP | — |
| Boîtier | TQFP-144 (LFQFP, gull-wing) | 144-LQFP (TQFP, ATC suffix) |
| Température de fonctionnement | 0C to +70C (Commercial) | 0C to +70C (commercial) [DATA_NEEDED: exact operating-temp grade letter for -10N suffix] |
| Nombre de broches | 144 | — |
| Type de montage | Surface Mount | Surface Mount |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 (speed grades -4 to -10) | — |
| JTAG Support | IEEE Std. 1149.1 boundary-scan | IEEE Std. 1149.1 with pin-locking |
| Series | — | MAX 3000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 256 |
| Usable Gates | — | 5,000 (up to 10,000 usable in family) |
| Number of I/Os | — | 116 |
| Number of Logic Elements / Blocks | — | 16 LABs |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Maximum Counter Frequency | — | 227.3 MHz |
| Global Clocks | — | 3 |
| Global Clear / OE | — | Yes (1 global clear, 1 global OE) |
| Program Memory Type | — | EEPROM (non-volatile, in-system programmable) |
| ISP Compliance | — | IEEE Std. 1532 |
| Boundary-Scan Test (BST) | — | Built-in, IEEE 1149.1 compliant |
| Statut RoHS | — | [DATA_NEEDED: RoHS compliance - not explicitly confirmed in verified data] |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: not explicitly confirmed in verified data] |