EPM3512AQC208-10N vs EPM3512AQC208-15N Comparaison
Comparaison détaillée côte à côte de EPM3512AQC208-10N par Intel et EPM3512AQC208-15N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera
EPM3512AQC208-15N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPM3512AQC208-10N | EPM3512AQC208-15N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $42,80 | $20,50 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macrocells | 512 | — |
| Usable Gates | Up to 10,000 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/Os | 172 | — |
| Boîtier | 208-pin PQFP (Plastic Quad Flat Pack) | PQFP-208 (QC208) |
| Tension d'alimentation | 3.3 V | — |
| Pin-to-Pin Delay | 4.5 ns (-10 speed grade) | — |
| Maximum Internal Frequency | 227.3 MHz | — |
| Speed Grade | -10 | — |
| Process Technology | CMOS EEPROM | — |
| In-System Programming | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 | — |
| Boundary-Scan Test (BST) | Built-in, IEEE 1149.1 compliant | — |
| I/O Standards | MultiVolt (1.8V / 2.5V / 3.3V) | — |
| Température de fonctionnement | 0 C to 70 C (commercial) | 0C to +70C (commercial) |
| Statut RoHS | [DATA_NEEDED: RoHS status not in verified web data] | [DATA_NEEDED: RoHS status] |
| Macro Cells | — | 512 |
| Maximum User I/O Pins | — | 172 |
| Typical Usable Gates | — | 12,000 |
| Number of Logic Elements | — | 512 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Operating Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V (MultiVolt) |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI (with external resistor) |
| In-System Programmability | — | Yes (IEEE Std. 1532 compliant) |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG Support | — | Yes (BST/Boundary-Scan Test) |
| Type de montage | — | Surface Mount |