EPM3512AQC208-3N vs EPM3512AQC208-15N Comparaison
Comparaison détaillée côte à côte de EPM3512AQC208-3N par Altera et EPM3512AQC208-15N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera
EPM3512AQC208-15N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPM3512AQC208-3N | EPM3512AQC208-15N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $16,40 | $20,50 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | — |
| User I/O Pins | 172 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Macrocells per LAB | 32 | — |
| Pin-to-Pin Logic Delay | 3 ns (speed grade -3) | — |
| Global Clock Setup Time | [DATA_NEEDED: actual tSU at 3 ns grade] | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V (MultiVolt 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant) | 2.5 V / 3.3 V (MultiVolt) |
| Température de fonctionnement | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Boîtier | PQFP-208 | PQFP-208 (QC208) |
| Type de montage | Surface Mount | Surface Mount |
| Programming Technology | EEPROM (non-volatile, in-system programmable) | — |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| ISP Compliance | IEEE Std. 1532 | — |
| Statut RoHS | [DATA_NEEDED: not stated in retrieved snippets] | [DATA_NEEDED: RoHS status] |
| Lead-Free / Halogen-Free | [DATA_NEEDED] | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Macro Cells | — | 512 |
| Maximum User I/O Pins | — | 172 |
| Typical Usable Gates | — | 12,000 |
| Number of Logic Elements | — | 512 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Operating Supply Voltage (VCCINT) | — | 3.3 V |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI (with external resistor) |
| In-System Programmability | — | Yes (IEEE Std. 1532 compliant) |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG Support | — | Yes (BST/Boundary-Scan Test) |